内存储器4内存储器接口

4内存储器接口

The storage capacity of the 1 memory chip: refers to the amount of binary information memory chip can hold, in addressing the product number and storage word digit memory address register said, such as the storage capacity of memory chip 6116 chip is 2K*8, saidtheaddress line 12, theword is storedfor8 digits.Access time of the 2 memory chip is defined as the time required to start the primary memory operation to complete the operation 3 words: "good at low 8 byte value of 16 words in the 8086 system to access the stored in my memory, known as the" aligned "word alignment, for good words, as long as 8086 CPU a bus cycle can be done on the word access

4 parity split: memoryaddress space 1M 8086 bytes in the system is divided into two 512K bytes of memory--"my memory"and"odd memory", even with low memory 8086 8 bit data bus D0 ~ D7 is odd high 8 bit data memory line with 8086 D8~D15 connected to the address bus A1 ~A19 with two banks in the address line A0~ A18 connected to the low address line A0 and bus high allow "BHE*to choose even and odd memory bank. This connection method is called parity".

5 RAM chip on-chip address line and data line number:

(1) 4K * 8 bits: address line 12, data line 8;

(2) 512K * 4 bits: address line 19, data line 4;

(3) 1M * 1 bits: address line 20, data line 1 ;

(4) 2K * 8 bits: address line 11, data line 8.

66116 chip each pin function

6116 is a 2048 x 8 bit static RAM chip with 11 address lines to receive the address signal sent by CPU to select the memory cell to which the CPU is to be accessed. 6116, there are 8 data lines used for reading and writing data in the memory cell. The control signal line 3: CE* chip select signal to select to access the memory chip, CE* pins are usually the same output address decoder is connected to the memory unit and the address decoder input CPU to read and write the high address line. For example, the address of the CPU line is 20 bits, and the memory chip address line 11, address decoder input can be as high as 9 bit address line (A19~A11) ; a write enable signal WE* and an output enable signal OE*, the two signal control signal is written and read to the memory chip, usually the same CPU WR and RD* pins.

72164 chip each pin function

The 2164 is a 64K x 1 bit dynamic RAM chip, 8 address lines,can accept 16 address signals, so it is necessary to use the address multiplexer, the 16bitaddress signal into a8 bit line address and the 8 address to the 2164 row address line. There are 2 lines of data, DIN (input data) and DOUT (output data)that are used to write or read one bit of data information. There are also three control signal lines: RAS* -line address strobe signal. Used to lock 8 bit address; CAS*-column address strobe signal, used to lock the 8 row address; WRITE* - read -write

control signal, used to control the 2164 chip read and write.82732 chip each pin function

The 2732 is a 4K* 8 bit erasable programmable read only memory chip.

There are 12 address lines that can accept the 12 bit address signal from the CPU to select the memory cell to which the CPU is to be accessed. 2732 there are 8 data lines, a data storage unit for reading and writing (in programming work) , there are two control signal lines: line CE* chip allows the chip to select, make it work, allowing the output line OE* is used to output data to the data on the line, only when the two control line at the same time. Effective, to read data from the output end, the readout condition; in programming, OE* programming power line connection VPP=21V, CE* connected to a 50ms active low pulse TTL programming, each such a negative pulse control write a 8 bit data to address a.

9 how many RAM chips are needed in the storage system using the following chips and how many bits of address are needed to decode the off chip address. The system is a 20 bit address line and uses full decoding

(1) a storage system consisting of 512 * 4 bit RAM 16KB:Requires 16KB/512*4=64; the outer address decoding requires 11 bit address lines.

(2) a storage system consisting of 1024 * 1 bit RAM 128KB:

128KB/ lK*8 = 1024 is required; 10 bit address line is needed for decoding of out of chip address;

(3) 2K * 4 bit RAM constitute the storage system of 64KB:Requires 64KB/2K* 2=64; 9 bit address lines are required for decoding of out of chip addresses.

(4) 64K * L bit RAM constitute the storage system of 256KB:We need 256KB / 64K * 8 bits = 32 pieces, and the out of chip address needs 4 bit address lines.

10 what are the memory bars and what are the advantages of using memory?

Memory is a small card appears in the form of memory storage products, a plurality of memory chips are mounted on the printed circuit boardof a strip on the 30, 72 or 168 pinprinting plate on the long side, the memory can be inserted on the motherboard memory slot. The advantage of using memory is that it is easy to install, easy to change and easy to add or expand memory capacity.

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