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CXD3406GATimingGeneratorandSignalProcessorforFrameReadoutCCDImageSensorDescriptionTheCXD3406GAisatiminggeneratorandCCDsignalprocessorICfortheICX252/262CCDimagesensor.
FeaturesTiminggeneratorfunctionsHorizontaldrivefrequency12to18MHz(Baseoscillationfrequency24to36MHz)Supportsframereadout/draft(sextuplespeed)/AF(Autofocusdrive)High-speed/low-speedshutterfunctionHorizontalandverticaldriversforCCDimagesensorCCDsignalprocessorfunctionsCorrelateddoublesamplingProgrammablegainamplifier(PGA)allowsgainadjustmentoverawiderange(–6to+42dB)10-bitA/DconverterChipScalePackage(CSP):CSPallowsvastreductionintheCCDcamerablockfootprintApplicationsDigitalstillcamerasStructureSilicongateCMOSICApplicableCCDImageSensorsICX252(1/1.
8",3240Kpixels)ICX262(1/1.
8",3240Kpixels)AbsoluteMaximumRatingsSupplyvoltageVDDa,VDDb,VDDc,VDDdVSS–0.
3to+7.
0VVDDe,VDDf,VDDgVSS–0.
3to+4.
0VVL–10.
0toVSSVVHVL–0.
3to+26.
0VInputvoltage(analog)VINVSS–0.
3toVDD+0.
3VInputvoltage(digital)VIVSS–0.
3toVDD+0.
3VOutputvoltageVO1VSS–0.
3toVDD+0.
3VVO2VL–0.
3toVSS+0.
3VVO3VL–0.
3toVH+0.
3VOperatingtemperatureTopr–20to+75°CStoragetemperatureTstg–55to+125°CRecommendedOperatingConditionsSupplyvoltageVDDb3.
0to5.
5VVDDa,VDDc,VDDd3.
0to3.
6VVM0.
0VVH14.
5to15.
5VVL–7.
0to–8.
0VVDDe,VDDf,VDDg3.
0to3.
6VOperatingtemperatureTopr–20to+75°C–1–E00Z02A26Sonyreservestherighttochangeproductsandspecificationswithoutpriornotice.
Thisinformationdoesnotconveyanylicensebyanyimplicationorotherwiseunderanypatentsorotherright.
Applicationcircuitsshown,ifany,aretypicalexamplesillustratingtheoperationofthedevices.
Sonycannotassumeresponsibilityforanyproblemsarisingoutoftheuseofthesecircuits.
96pinLFLGA(Plastic)–2–CXD3406GABlockDiagramC7C3A1NCA2NCD8C2D7C1B8AVDD3B6AVDD4B9AVSS3A6AVSS4C5AVSS5A3SCK2A4SSI2B4SEN2A5TEST3C4TEST4B5TEST5E2DVDD1F2DVSS3F3DVDD2E3DVSS1F1B3DVSS2D0(LSB)LatchSerialPortRegisterDACPGACDSADCPreblankingDummyPixelAutoZeroPulseGeneratorVDriverSerialPortRegisterBlackLevelAutoZeroB2D1B1D2C3D3C2D4C1D5D3D6D2D7D1D8E1D9(MSB)G1ADCLKIG2CLPOBIG3CLPDMIL3VSS4H1ADCLKH2CLPOBH3CLPDMJ3VSS5L1OSCIK1OSCOJ1CKIJ2CKOK2MCKON8SNCSLL2SSI1M6VLL4VMM5VHM9WENN9IDJ7VSS3J9H2J8H1H9VDD3K9VSS2K8RGK7VDD2H8VDD4H7XRSG7PBLKG8XSHDG9XSHPF7PBLKIF8XSHDIE7AVSS2F9XSHPID9AVSS1E8AVDD2E9AVDD1C9CCDINC6C9A7C8B7C7A8AVSS6A9AVDD5C8C4M1SCK1N1SEN1N3VSS6L7VSS1K3VDD5L9VDD1M2VDN2HDN7SUBN4V4N6V3BV3AL6V2M4N5V1BM7TEST2M3TEST1M8RSTSSGL8SSGSLL5V1ALatchSelectorSelector1/2–3–CXD3406GAPinConfiguration(TopView)NCD2D5D8D9DVSS2ADCLKIADCLKCKIOSCOOSCISCK1SEN1ABCDEFGHJKLMNNCD1D4D7DVDD1DVSS3CLPOBICLPOBCKOMCKOSSI1VDHDSCK2D0D3D6DVSS1DVDD2CLPDMICLPDMVSS5VDD5VSS4TEST1VSS6SSI2SEN2TEST4VMV2V4TEST3TEST5AVSS5V1AVHV1BAVSS4AVDD4C9V3AVLV3BC8C7C3C1AVSS2PBLKIPBLKXRSVSS3VDD2VSS1TEST2SUBAVSS6AVDD3C4C2AVDD2XSHDIXSHDVDD4H1RGSSGSLRSTSNCSLAVDD5AVSS3CCDINAVSS1AVDD1XSHPIXSHPVDD3H2VSS2VDD1WENID123456789–4–CXD3406GAPinDescriptionNoconnected.
Noconnected.
CCDsignalprocessorblockserialinterfaceclockinput.
(Schmitttrigger)CCDsignalprocessorblockserialinterfacedatainput.
(Schmitttrigger)CCDsignalprocessorblocktestinput3.
ConnecttoDVSS.
CCDsignalprocessorblockanalogGND.
Capacitorconnection.
CCDsignalprocessorblockanalogGND.
CCDsignalprocessorblockanalogpowersupply.
ADCoutput.
ADCoutput.
ADCoutput(LSB).
CCDsignalprocessorblockserialinterfaceenableinput.
(Schmitttrigger)CCDsignalprocessorblocktestinput5.
ConnecttoDVDD.
CCDsignalprocessorblockanalogpowersupply.
Capacitorconnection.
CCDsignalprocessorblockanalogpowersupply.
CCDsignalprocessorblockanalogGND.
ADCoutput.
ADCoutput.
ADCoutput.
CCDsignalprocessorblocktestinput4.
ConnecttoDVSS.
CCDsignalprocessorblockanalogGND.
Capacitorconnection.
Capacitorconnection.
Capacitorconnection.
CCDoutputsignalinput.
ADCoutput.
ADCoutput.
ADCoutput.
Capacitorconnection.
Capacitorconnection.
CCDsignalprocessorblockanalogGND.
ADCoutput(MSB).
CCDsignalprocessorblockdigitalpowersupply.
(PowersupplyforADC)A1A2A3A4A5A6A7A8A9B1B2B3B4B5B6B7B8B9C1C2C3C4C5C6C7C8C9D1D2D3D7D8D9E1E2NCNCSCK2SSI2TEST3AVSS4C8AVSS6AVDD5D2D1D0SEN2TEST5AVDD4C7AVDD3AVSS3D5D4D3TEST4AVSS5C9C3C4CCDIND8D7D6C1C2AVSS1D9DVDD1——III————OOOII————OOOI————IOOO———O—PinNo.
SymbolI/ODescription–5–CXD3406GACCDsignalprocessorblockdigitalGND.
(GNDforADC)CCDsignalprocessorblockanalogGND.
CCDsignalprocessorblockanalogpowersupply.
CCDsignalprocessorblockanalogpowersupply.
CCDsignalprocessorblockdigitalGND.
CCDsignalprocessorblockdigitalGND.
CCDsignalprocessorblockdigitalpowersupply.
Pulseinputforhorizontalandverticalblankingperiodpulsecleaning.
(Schmitttrigger)CCDdatalevelsample-and-holdpulseinput.
(Schmitttrigger)CCDprechargelevelsample-and-holdpulseinput.
(Schmitttrigger)Clockinputforanalog/digitalconversion.
(Schmitttrigger)CCDopticalblacksignalclamppulseinput.
(Schmitttrigger)CCDdummysignalclamppulseinput.
(Schmitttrigger)Pulseoutputforhorizontalandverticalblankingperiodpulsecleaning.
CCDdatalevelsample-and-holdpulseoutput.
CCDprechargelevelsample-and-holdpulseoutput.
Clockoutputforanalog/digitalconversion.
CCDopticalblacksignalclamppulseoutput.
CCDdummysignalclamppulseoutput.
Sample-and-holdpulseoutputforanalog/digitalconversionphasealignment.
Timinggeneratorblockdigitalpowersupply.
(PowersupplyforCDSblock)Timinggeneratorblock3.
0to5.
0Vpowersupply.
(PowersupplyforH1/H2)Inverterinput.
Inverteroutput.
TiminggeneratorblockdigitalGND.
TiminggeneratorblockdigitalGND.
CCDhorizontalregisterclockoutput.
CCDhorizontalregisterclockoutput.
Inverteroutputforoscillation.
Whennotused,leaveopenorconnectacapacitor.
SystemclockoutputforsignalprocessorIC.
Timinggeneratorblockdigitalpowersupply.
(Powersupplyforcommonlogicblock)Timinggeneratorblockdigitalpowersupply.
(PowersupplyforRG)CCDresetgatepulseoutput.
TiminggeneratorblockdigitalGND.
Inverterinputforoscillation.
Whennotused,fixtolow.
E3E7E8E9F1F2F3F7F8F9G1G2G3G7G8G9H1H2H3H7H8H9J1J2J3J7J8J9K1K2K3K7K8K9L1DVSS1AVSS2AVDD2AVDD1DVSS2DVSS3DVDD2PBLKIXSHDIXSHPIADCLKICLPOBICLPDMIPBLKXSHDXSHPADCLKCLPOBCLPDMXRSVDD4VDD3CKICKOVSS5VSS3H1H2OSCOMCKOVDD5VDD2RGVSS2OSCI———————IIIIIIOOOOOOO——IO——OOOO——O—IPinNo.
SymbolI/ODescription–6–CXD3406GATiminggeneratorblockserialinterfacedatainput.
Schmitttriggerinput/Noprotectivediodeonpowersupplyside.
TiminggeneratorblockdigitalGND.
TiminggeneratorblockdigitalGND.
(GNDforverticaldriver)CCDverticalregisterclockoutput.
CCDverticalregisterclockoutput.
TiminggeneratorblockdigitalGND.
InternalSSGenable.
High:InternalSSGvalid,Low:ExternalSYNCvalid(Withpull-downresistor)Timinggeneratorblockdigitalpowersupply.
(Powersupplyforcommonlogicblock)Timinggeneratorblockserialinterfaceclockinput.
Schmitttriggerinput/Noprotectivediodeonpowersupplyside.
Verticalsyncsignalinput/output.
Timinggeneratorblocktestinput1.
NormallyfixtoGND.
(Withpull-downresistor)CCDverticalregisterclockoutput.
Timinggeneratorblock15.
0Vpowersupply.
(Powersupplyforverticaldriver)Timinggeneratorblock–7.
5Vpowersupply.
(Powersupplyforverticaldriver)Timinggeneratorblocktestinput2.
NormallyfixtoGND.
(Withpull-downresistor)Timinggeneratorblockresetinput.
High:Normaloperation,Low:ResetcontrolNormallyapplyresetduringpower-on.
Schmitttriggerinput/NoprotectivediodeonpowersupplysideMemorywritetimingpulseoutput.
Timinggeneratorblockserialinterfacestrobeinput.
Schmitttriggerinput/NoprotectivediodeonpowersupplysideHorizontalsyncsignalinput/output.
TiminggeneratorblockdigitalGND.
CCDverticalregisterclockoutput.
CCDverticalregisterclockoutput.
CCDverticalregisterclockoutput.
CCDelectronicshutterpulseoutput.
Controlinputusedtoswitchsyncsystem.
High:CKIsync,Low:MCKOsync(Withpull-downresistor)Verticaldirectionlineidentificationpulseoutput.
L2L3L4L5L6L7L8L9M1M2M3M4M5M6M7M8M9N1N2N3N4N5N6N7N8N9SSI1VSS4VMV1AV3AVSS1SSGSLVDD1SCK1VDTEST1V2VHVLTEST2RSTWENSEN1HDVSS6V4V1BV3BSUBSNCSLIDI——OO—I—II/OIO——IIOII/O—OOOOIOPinNo.
SymbolI/ODescription–7–CXD3406GAElectricalCharacteristicsTimingGeneratorBlockElectricalCharacteristicsDCCharacteristics(Withintherecommendedoperatingconditions)VDD2VDD3VDD4VDD1,VDD5RSTSSI1,SCK1,SEN1TEST1,TEST2SNCSL,SSGSLVD,HDH1,H2RGXSHP,XSHD,XRS,PBLK,CLPOB,CLPDM,ADCLKCKOMCKOID,WENV1A,V1B,V3A,V3B,V2,V4SUBVDDaVDDbVDDcVDDdVi+Vi–Vi+Vi–VIH1VIL1VIH2VIL2VIH3VIL3VOH1VOL1VOH2VOL2VOH3VOL3VOH5VOL5VOH6VOL6VOH7VOL7IOLIOM1IOM2IOHIOSLIOSH3.
03.
03.
03.
00.
8VDDd0.
8VDDd0.
7VDDd0.
7VDDd0.
8VDDdVDDd–0.
8VDDb–0.
8VDDa–0.
8VDDd–0.
8VDDd–0.
8VDDd–0.
810.
05.
05.
43.
33.
33.
33.
33.
65.
53.
63.
60.
2VDDd0.
2VDDd0.
2VDDd0.
3VDDd0.
2VDDd0.
40.
40.
40.
40.
40.
4–5.
0–7.
2–4.
0VVVVVVVVVVVVVVVVVVVVVVVVVVmAmAmAmAmAmAFeedcurrentwhereIOH=–1.
2mAPull-incurrentwhereIOL=2.
4mAFeedcurrentwhereIOH=–22.
0mAPull-incurrentwhereIOL=14.
4mAFeedcurrentwhereIOH=–3.
3mAPull-incurrentwhereIOL=2.
4mAFeedcurrentwhereIOH=–6.
9mAPull-incurrentwhereIOL=4.
8mAFeedcurrentwhereIOH=–3.
3mAPull-incurrentwhereIOL=2.
4mAFeedcurrentwhereIOH=–2.
4mAPull-incurrentwhereIOL=4.
8mAV1A/B,V2,V3A/B,V4=–8.
25VV1A/B,V2,V3A/B,V4=–0.
25VV1A/B,V3A/B=0.
25VV1A/B,V3A/B=14.
75VSUB=–8.
25VSUB=14.
75VSupplyvoltage1Supplyvoltage2Supplyvoltage3Supplyvoltage4Inputvoltage11Inputvoltage22Inputvoltage33Inputvoltage44Input/outputvoltageOutputvoltage1Outputvoltage2Outputvoltage3Outputvoltage4Outputvoltage5Outputvoltage6Outputcurrent1Outputcurrent2ItemPinsSymbolConditionsMin.
Typ.
Max.
Unit1ThisinputpinisaschmitttriggerinputanditdoesnothaveprotectivediodeofthepowersupplysideintheIC.
2Theseinputpinsareschmitttriggerinputs.
3Theseinputpinsarewithpull-downresistorintheIC.
4Theseinputpinsarewithpull-downresistorintheICandtheydonothaveprotectivediodeofthepowersupplysideintheIC.
Note)Theabovetableindicatestheconditionfor3.
3Vdrive.
VOH4FeedcurrentwhereIOH=–3.
3mAVDDc–0.
8VVOL4Pull-incurrentwhereIOL=2.
4mA0.
4V–8–CXD3406GAInverterI/OCharacteristicsforOscillation(Withintherecommendedoperatingconditions)ItemLogicalVthInputvoltageOutputvoltageFeedbackresistorOscillationfrequencyPinsOSCIOSCIOSCOOSCI,OSCOOSCI,OSCOSymbolLVthVIHVILVOHVOLRFBfConditionsFeedcurrentwhereIOH=–3.
6mAPull-incurrentwhereIOL=2.
4mAVIN=VDDdorVSSMin.
0.
7VDDdVDDd–0.
8500k20Typ.
VDDd/22MMax.
0.
3VDDd0.
45M50UnitVVVVVMHzItemLogicalVthInputvoltageInputamplitudePinsCKISymbolLVthVIHVILVINConditionsfmax50MHzsinewaveMin.
0.
7VDDd0.
3Typ.
VDDd/2Max.
0.
3VDDdUnitVVVVp-pItemRisetimeFalltimeOutputnoisevoltageSymbolTTLMTTMHTTLHTTMLTTHMTTHLVCLHVCLLVCMHVCMLConditionsVLtoVMVMtoVHVLtoVHVMtoVLVHtoVMVHtoVLMin.
2002003020020030Typ.
3503506035035060Max.
50050090500500901.
01.
01.
01.
0UnitnsnsnsnsnsnsVVVVInverterInputCharacteristicsforBaseOscillationClockDutyAdjustment(Withintherecommendedoperatingconditions)Note)Inputvoltageistheinputvoltagecharacteristicsfordirectinputfromanexternalsource.
Inputamplitudeistheinputamplitudecharacteristicsinthecaseofinputthroughacapacitor.
SwitchingCharacteristics(VH=15.
0V,VM=GND,VL=–7.
5V)Notes)1.
TheMOSstructureofthisIChasalowtoleranceforstaticelectricity,sofullcareshouldbegivenformeasurestopreventelectrostaticdischarge.
2.
Fornoiseandlatch-upcountermeasures,besuretoconnectaby-passcapacitor(0.
1Formore)betweeneachpowersupplypin(VH,VL)andGND.
3.
ToprotecttheCCDimagesensor,clamptheSUBpinoutputatVHbeforeinputtotheCCDimagesensor.
–9–CXD3406GASwitchingWaveformsV1A(V1B,V3A,V3B)V2(V4)SUBTTMHTTHMVHVMVLVMVLVHVL90%10%90%10%TTLMTTLM90%10%90%10%TTLHTTHL90%90%10%10%TTML90%10%TTML90%10%WaveformNoiseVCMHVCMLVMVLVCLHVCLL–10–CXD3406GAMeasurementCircuitN1N2L4L5L6N7L7N8N9M1M2M3N4N5N6M4N3L2K2K9K8K7K1L1K3J9J8J7J3J2J1H9H8H7H3H2L3G9G8G7A2A1A3A4A5A6A7A8A9B1B2B3B4B5B6B7B9B8C1C2C3C4C5C6M5M6E1L8L9M7M8M9E8D8D7D3D2D1C9C8C7F3F2G1E9D9E7G3G2H1F9F8F7F1E3E2VDCXD3406GAV2VHVLD9SSGSLVDD1SCK1VDTEST1V4V1BV3BTEST2RSTWENSEN1HDVMV1AV3ASUBVSS1SNCSLIDCLPDMICLPOBIADCLKXSHPIXSHDIPBLKIDVDD2DVSS3ADCLKIAVDD1AVSS1AVSS2DVSS2DVSS1DVDD1AVDD2C2C1D6D7D8CCDINC4C3VSS6SSI1MCKOVSS2RGVDD2OSCOOSCIVDD5H2H1VSS3VSS5CKOCKIVDD3VDD4XRSCLPDMCLPOBVSS4XSHPXSHDPBLKNCNCSCK2SSI2TEST3AVSS4C8AVSS6AVDD5D2D1D0SEN2TEST5AVDD4C7AVSS3AVDD3D5D4D3TEST4AVSS5C9SerialinterfacedataHD+3.
3V+15.
0V–7.
5VC2C2C2C2C2R1R1R1R2R1R1R1C2C2C2C2C2C2C2C2C2C1C1C1C1C1C1C2C3CKIC6C4C5C5C6C6C13300pFC2560pFC3820pFC430pFC5215pFC610pFR130R210–11–CXD3406GAACCharacteristicsACcharacteristicsbetweentheserialinterfaceclocksSSI10.
2VDDd0.
2VDDd0.
8VDDdts2th1ts1ts30.
8VDDd0.
8VDDdSCK1SEN1SEN1Symbolts1th1ts2ts3DefinitionSSI1setuptime,activatedbytherisingedgeofSCK1SSI1holdtime,activatedbytherisingedgeofSCK1SCK1setuptime,activatedbytherisingedgeofSEN1SEN1setuptime,activatedbytherisingedgeofSCK1Min.
Typ.
Max.
20202020UnitnsnsnsnsSerialinterfaceclockinternalloadingcharacteristics(1)(Withintherecommendedoperatingconditions)th1EnlargedviewExample:Duringframemode0.
2VDDdts10.
2VDDdV1AVDHDHDV1ASEN10.
8VDDdSymbolts1th1DefinitionSEN1setuptime,activatedbythefallingedgeofHDSEN1holdtime,activatedbythefallingedgeofHDMin.
Typ.
Max.
0102UnitnssBesuretomaintainaconstantlyhighSEN1logiclevelnearthefallingedgeoftheHDinthehorizontalperiodduringwhichV1A/BandV3A/Bvaluestaketheternaryvalueandduringthathorizontalperiod.
(Withintherecommendedoperatingconditions)–12–CXD3406GASerialinterfaceclockoutputvariationcharacteristicsNormally,theserialinterfacedataisloadedtotheCXD3406GAatthetimingshownin"Serialinterfaceclockinternalloadingcharacteristics(1)"above.
However,oneexceptiontothisiswhenthedatasuchasSTBisloadedtotheCXD3406GAandcontrolledattherisingedgeofSEN1.
See"DescriptionofOperation".
0.
8VDDdSEN1OutputsignaltpdPULSESymboltpdPULSEDefinitionOutputsignaldelay,activatedbytherisingedgeofSEN1Min.
Typ.
Max.
1005Unitns(Withintherecommendedoperatingconditions)Serialinterfaceclockinternalloadingcharacteristics(2)th1Enlargedview0.
2VDDdts10.
2VDDdVDHDVDHDSEN10.
8VDDdExample:DuringframemodeSymbolts1th1DefinitionSEN1setuptime,activatedbythefallingedgeofVDSEN1holdtime,activatedbythefallingedgeofVDMin.
Typ.
Max.
0200UnitnsnsBesuretomaintainaconstantlyhighSEN1logiclevelnearthefallingedgeofVD.
(Withintherecommendedoperatingconditions)–13–CXD3406GARST0.
2VDDdtw10.
8VDDdVD,HDMCKOts1th10.
2VDDd0.
8VDDd0.
2VDDdRSTloadingcharacteristicsSymboltw1DefinitionRSTpulsewidthMin.
Typ.
Max.
35Unitns(Withintherecommendedoperatingconditions)VDandHDloadingcharacteristicsSymbolts1th1DefinitionVDandHDsetuptime,activatedbytherisingedgeofMCKOVDandHDholdtime,activatedbytherisingedgeofMCKOMin.
Typ.
Max.
205UnitnsnsMCKOloadcapacitance=10pF(Withintherecommendedoperatingconditions)0.
8VDDdMCKOWEN,IDtpd1WENandIDloadcapacitance=10pF(Withintherecommendedoperatingconditions)Symboltpd1DefinitionTimeuntiltheaboveoutputschangeaftertheriseofMCKOMin.
Typ.
Max.
6020UnitnsOutputvariationcharacteristics–14–CXD3406GACCDSignalProcessorBlockElectricalCharacteristicsDCCharacteristics(Fc=18MSPS,DVDD1,2=AVDD1,2,3,4,5=3.
3V,Ta=25°C)ItemSupplyvoltage1Supplyvoltage2Supplyvoltage3AnaloginputcapacitanceInputvoltageA/DclockdutyOutputvoltagePinsDVDD1DVDD2AVDD1,AVDD2,AVDD3,AVDD4,AVDD5CCDINSCK2,SSI2,SEN2,TEST3,TEST4,XSHDI,XSHPI,ADCLKI,CLPOBI,CLPDMI,PBLKIADCLKID0toD9SymbolVDDeVDDfVDDgCINVI+VI–VOHVOLConditionsFeedcurrentwhereIOH=–2.
0mAPull-incurrentwhereIOL=2.
0mAMin.
3.
03.
03.
0VDDe–0.
9Typ.
3.
33.
33.
3151.
81.
150Max.
3.
63.
63.
60.
4UnitVVVpFVV%VVAnalogCharacteristics(Fc=18MSPS,DVDD1,2=AVDD1,2,3,4,5=3.
3V,Ta=25°C)ItemCCDINinputvoltageamplitudePGAmaximumgainPGAminimumgainADCresolutionADCmaximumconversionrateADCintegralnon-linearityerrorADCdifferentialnon-linearityerrorSignal-to-noiseratioCCDINinputvoltageclamplevelCCDopticalblacksignalclamplevelSymbolVINGmaxGminFcmaxELEDSNR1CLPOBConditionsPGAgain=0dB,outputfullscalePGAgainsettingdata="3FFh"PGAgainsettingdata="000h"PGAgain=0dBPGAgain=0dBCCDINinputconnectedtoGNDviaacouplingcapacitorPGAgain=0dBOBLVL="8h"PGAgain=0dBMin.
90018Typ.
42–610±1.
0±0.
5621.
532Max.
1100±5.
0±1.
0UnitmVdBdBbitMHzLSBLSBdBVLSB1SNR=20log(full-scalevoltage/rmsnoise)–15–CXD3406GAACCharacteristicsACcharacteristicsbetweentheserialinterfaceclocksSSI20.
2VDD0.
2VDD0.
8VDDts2th1ts1ts30.
8VDD0.
8VDDSCK2SEN2SEN2Symboltp1ts1th1ts2ts3DefinitionSCK2clockperiodSSI2setuptime,activatedbytheriseofSCK2SSI2holdtime,activatedbytheriseofSCK2SCK2setuptime,activatedbytheriseofSEN2SEN2setuptime,activatedbytheriseofSCK2Min.
Typ.
Max.
10030303030Unitnsnsnsnsns(Fc=18MSPS,DVDD1,2=AVDD1,2,3,4,5=3.
3V,Ta=25°C)Thesettingvaluesarereflectedtotheoperation5or6ADCLKIclocksaftertheserialdataisloadedattheriseofSEN2.
–16–CXD3406GACDS/ADCTimingChartNN+1N–10CCDINXSHPIXSHDIADCLKID0toD9N–9N–8N–7tw1DLN+2N+3Symboltw1DLDefinitionADCLKIclockperiodADCLKIclockdutyDatalatencyMin.
Typ.
Max.
50954Unitns%clocks(Fc=18MSPS,DVDD1,2=AVDD1,2,3,4,5=3.
3V,Ta=25°C)SettheinputpulsepolaritysettingdataD13,D14andD15oftheserialinterfacedatato"0".
PreblankingTimingChart11Clocks11ClocksPBLKIADCLKID0toD9All"0"–17–CXD3406GADescriptionofOperationPulsesoutputfromtheCXD3406GA'stiminggeneratorblockarecontrolledmainlybytheRSTpinandbytheserialinterfacedata.
ThePinStatusTableisshownbelow,andthedetailsofserialinterfacecontrolaredescribedonpage19andthereafter.
PinStatusTablePinNo.
A1A2A3A4A5A6A7A8A9B1B2B3B4B5B6B7B8B9C1C2C3C4C5C6C7C8C9D1D2NCNCSCK2SSI2TEST3AVSS4C8AVSS6AVDD5D2D1D0SEN2TEST5AVDD4C7AVDD3AVSS3D5D4D3TEST4AVSS5C9C3C4CCDIND8D7—————————————————————————————D3D7D8D9E1E2E3E7E8E9F1F2F3F7F8F9G1G2G3G7G8G9H1H2H3H7H8H9J1D6C1C2AVSS1D9DVDD1DVSS1AVSS2AVDD2AVDD1DVSS2DVSS3DVDD2PBLKIXSHDIXSHPIADCLKICLPOBICLPDMIPBLKXSHDXSHPADCLKCLPOBCLPDMXRSVDD4VDD3CKI———————————————————ACTLLHACTLLACTACTLLACTACTLLACTACTLLHACTLLHACTLLACT——ACTACTACTACTSymbolPinNo.
SymbolCAMSLPRSTSTBCAMSLPRSTSTB–18–CXD3406GA1Itisforoutput.
Forinput,allitemsare"ACT".
Note)ACTmeansthatthecircuitisoperating,andDISmeansthatloadingisstopped.
Lindicatesalowoutputlevel,andHahighoutputlevelinthecontrolledstatus.
Also,VH,VMandVLindicatethevoltagelevelsappliedtoVH(PinM5),VM(PinL4)andVL(PinM6),respectively,inthecontrolledstatus.
PinNo.
J2J3J7J8J9K1K2K3K7K8K9L1L2L3L4L5L6L7L8CKOVSS5VSS3H1H2OSCOMCKOVDD5VDD2RGVSS2OSCISSI1VSS4VMV1AV3AVSS1SSGSLACTACTLACT——ACTLLACTACTLLACTACTACTACTACTACTACTLACT——ACTLLACT—ACTACTACTACTACTACTACTDIS——ACTVHVHVMACTVHVHVL—ACTACTACTACTL9M1M2M3M4M5M6M7M8M9N1N2N3N4N5N6N7N8N9VDD1SCK1VD1TEST1V2VHVLTEST2RSTWENSEN1HD1VSS6V4V1BV3BSUBSNCSLID—ACTACTACTDISACTLLH—ACTVMVMVM———ACTACTACTLACTLLLACTACTACTDISACTLLH—ACTVMVMVLACTVHVHVMACTVHVHVLACTVHVHVLACTACTACTACTACTLLLSymbolPinNo.
SymbolCAMSLPRSTSTBCAMSLPRSTSTB–19–CXD3406GATimingGeneratorBlockSerialInterfaceControlTheCXD3406GA'stiminggeneratorblockbasicallyloadsandreflectsthetiminggeneratorblockserialinterfacedatasentinthefollowingformatinthereadoutportionatthefallingedgeofHD.
Here,readoutportionspecifiesthehorizontalperiodduringwhichV1A/BandV3A/B,etc.
taketheternaryvalue.
NotethatsomeitemsreflectthetiminggeneratorblockserialinterfacedataatthefallingedgeofVDortherisingedgeofSEN1.
000102030405060741424344454647SSI1SCK1SEN1Therearetwocategoriesoftiminggeneratorblockserialinterfacedata:CXD3406GAtiminggeneratorblockdrivecontroldata(hereafter"controldata")andelectronicshutterdata(hereafter"shutterdata").
Thedetailsofeachdataaredescribedbelow.
–20–CXD3406GAControlDataDataD00toD07D08toD09D10toD12D13toD14D15D16toD23D24toD33D34D35D36toD37D38toD39D40toD47SymbolCHIPCTGMODESMDPTSGCDAT———LDADSTB—FunctionChipenableCategoryswitchingDrivemodeswitchingElectronicshuttermodeswitchingInternalSSGoutputpatternswitchingAFdrivecontroldata———ADCLKlogicphaseswitchingStandbycontrol—Data=0Data=110000001→EnabledOthervalues→DisabledSeeD08toD09CTG.
SeeD10toD12MODE.
SeeD13toD14SMD.
NTSCequivalentPALequivalentSeeD16toD23CDAT.
——————SeeD36toD37LDAD.
SeeD38toD39STB.
——RSTAll0All0All0All00All0All010All0All010–21–CXD3406GAShutterDataDataD00toD07D08toD09D10toD19D20toD31D32toD41D42toD47SymbolCHIPCTGSVDSHDSPL—FunctionChipenableCategoryswitchingElectronicshutterverticalperiodspecificationElectronicshutterhorizontalperiodspecificationHigh-speedshutterpositionspecification—Data=0Data=110000001→EnabledOthervalues→DisabledSeeD08toD09CTG.
SeeD10toD19SVD.
SeeD20toD31SHD.
SeeD32toD41SPL.
——RSTAll0All0All0All0All0All0–22–CXD3406GADetailedDescriptionofEachDataShareddata:D08toD09CTG[Category]OfthedataprovidedtotheCXD3406GAbythetiminggeneratorblockserialinterface,theCXD3406GAloadsD10andsubsequentdatatoeachdataregisterasshowninthetablebelowaccordingtothecombinationofD08andD09.
D09001D0801XDescriptionofoperationLoadingtocontroldataregisterLoadingtoshutterdataregisterTestmodeD11001101D12000011D100101XXDescriptionofoperationDraftmode(sextuplespeed:default)Framemode(Afieldreadout)Framemode(BFieldreadout)FramemodeAF1modeAF2modeNotethattheCXD3406GAcanapplythesecategoriesconsecutivelywithinthesameverticalperiod.
However,careshouldbetakenasthedataisoverwrittenifthesamecategoryisapplied.
Controldata:D10toD12MODE[Drivemode]TheCXD3406GAtiminggeneratorblockdrivemodecanbeswitchedasfollows.
However,thedrivemodebitsareloadedtotheCXD3406GAandreflectedatthefallingedgeofVD.
Controldata:D15PTSG[InternalSSGoutputpattern]TheCXD3406GAinternalSSGoutputpatterncanbeswitchedasfollows.
However,thedrivemodebitsareloadedtotheCXD3406GAandreflectedatthefallingedgeofVD.
D1501DescriptionofoperationNTSCequivalentpatternPALequivalentpatternTheVDperiodineachpatternisdefinedasfollowsforeachdrivemode.
1Only944Hand945Hare1208ckperiod.
SeetheTimingChartsfortheactualoperation.
NTSCequivalentpatternPALequivalentpatternFramemode918H+1716ck945H1Draftmode262H+1144ck314H+1568ckAF1mode131H+572ck157H+784ckAF2mode65H+1430ck78H+1536ck–23–CXD3406GAControldata:D36toD37LDAD[ADCLKlogicphase]ThisindicatestheADCLKlogicphaseadjustmentdata.
Thedefaultis90°relativetoMCKO.
Controldata:D38toD39STB[Standby]Theoperatingmodeofthetiminggeneratorblockisswitchedasfollows.
However,thestandbybitsareloadedtotheCXD3406GAandcontrolisappliedimmediatelyattherisingedgeofSEN1.
D370011D360101Degreeofadjustment(°)090180270D39X01D38011SymbolCAMSLPSTBOperatingmodeNormaloperatingmodeSleepmodeStandbymodeSeethePinStatusTableforthepinstatusineachmode.
–24–CXD3406GATheframeshiftdataisexpressedasshowninthetablebelowusingD16toD23CDAT.
MSBLSBD23D22D21D20D19D18D17D160110↓61001↓9CDATisexpressedas69h.
Itsdefinitionareaisspecifiedasfollows.
AF1mode:00h≤CDAT≤FFh(11to23H)AF2mode:00h≤CDAT≤FFh(14to27H)Controldata:[AFdrive]TheCXD3406GAcontrolsthedriveoftheverticalcut-outareaofthelineinAF1/AF2modebyusingcontroldataD16toD23CDAT.
Thismodehasafunctiononpurposetoraiseframerateforautofocus(AF),andcannotsupportoperationsuchaselectricalimagestabilization.
TheAFdrivebitsareloadedtotheCXD3406GAandreflectedatthefallingedgeofVD.
Asshowninthefigurebelow,first,thefixedstageissweptathighspeed,anditgoestoreadoutperiodandverticalOBperiod.
ThennormaltransferisperformedequivalenttodraftmodefromtheframeshifttothestagespecifiedbytheserialinterfacedatatothetimingofthefallingedgeofthenextVD.
Therefore,thenumberofframeshiftstagesappliedtoCDATandthecontrolbyVDperiodareconditionsforitsapplication.
VD0V1AVckMODE00hFFhCDAT4000hFrameshiftNormaltransferHigh-speedsweepThenumberofhigh-speedsweeparedifferentaccordingtotheselectedmode.
Theyarespecifiedasfollows.
AF1mode:138stages(0to7H)AF2mode:208stages(0to11H)–25–CXD3406GAControldata/shutterdata:[Electronicshutter]TheCXD3406GArealizesvariouselectronicshutterfunctionsbyusingcontroldataD13toD14SMDandshutterdataD10toD19SVD,D20toD31SHDandD32toD41SPL.
Thesefunctionsaredescribedindetailbelow.
First,thevariousmodesareshownbelow.
ThesemodesareswitchedusingcontroldataD13toD14SMD.
D140011D130101DescriptionofoperationElectronicshutterstoppedmodeHigh-speed/low-speedshuttermodeHTSGcontrolmodeTheelectronicshutterdataisexpressedasshowninthetablebelowusingD20toD31SHDasanexample.
However,MSB(D31)isareservebitforthefuturespecification,anditishandledasadummyonthisIC.
MSBLSBD29D28D31D30D27D26D25D24D23D22D21D201100↓CX001↓10011↓3SHDisexpressedas1C3h.
[Electronicshutterstoppedmode]Duringthismode,allshutterdataitemsareinvalid.
SUBisnotoutputinthismode,sotheshutterspeedistheaccumulationtimeforonefield.
[High-speed/low-speedshuttermode]Duringthismode,theshutterdataitemshavethefollowingmeanings.
TheperiodduringwhichSVDandSHDarespecifiedtogetheristheshutterspeed.
Concretely,whenspecifyinghigh-speedshutter,SVDissetto"000h".
(Seethefigure.
)Duringlow-speedshutter,orinotherwordswhenSVDissetto"001h"orhigher,theserialinterfacedataisnotloadeduntilthisperiodisfinished.
Theverticalperiodindicatedherecorrespondstoonefieldineachdrivemode.
Inaddition,thenumberofhorizontalperiodsappliedtoSHDcanbeconsideredas(numberofSUBpulses–1).
However,intheframemodeAfield,itmatches(numberofSUBpulses+1).
Thisisaspecificationforflickerlesswhenthesamemodeisrepeated.
Butthischangemaynotoccurbecauseofflickerlessdependingontheconditionsduringlow-speedshutter.
Note)ThebitdatadefinitionareaisassuredintermsoftheCXD3406GAfunctions,anddoesnotassuretheCCDcharacteristics.
SymbolSVDSHDSPLDataD10toD19D20toD31D32toD41DescriptionNumberofverticalperiodsspecification(000h≤SVD≤3FFh)Numberofhorizontalperiodsspecification(000h≤SHD≤7FFh)Verticalperiodspecificationforhigh-speedshutteroperation(000h≤SPL≤3FFh)–26–CXD3406GAVDSHD01V1ASUBWENSMD000h002hSVD050h10FhSHD01SVDVDSPLSHD01V1ASUBWENSMD000h001hSPL000h002hSVD0A3h10FhSHD10SVDFurther,SPLcanbeusedduringthismodetospecifytheSUBoutputatthedesiredverticalperiodduringthelow-speedshutterperiod.
Inthecasebelow,SUBisoutputbasedonSHDattheSPLverticalperiodoutof(SVD+1)verticalperiods.
Incidentally,SPLiscountedas"000h","001h","002h"andsooninconformancewithSVD.
Usingthisfunction,itispossibletoachievesmoothexposuretimetransitionswhenchangingfromlow-speedshuttertohigh-speedshutterorvice-versa.
–27–CXD3406GAVDV1ASUBWEN0111Exposuretime01SMDVck[HTSGcontrolmode]Duringthismode,allshutterdataitemsareinvalid.
TheV1A/BandV3A/Bternaryleveloutputsarestopped,sotheshutterspeedisthevalueobtainedbyaddingtheshutterspeedspecifiedintheprecedingverticalperiodtotheverticalperiodduringwhichthesereadoutpulsesarestoppedasshowninthefigure.
–28–CXD3406GAVDSUBCLPOBCLPDMV1ACHigh-speedsweepblockHigh-speedsweepblockCV1BV2V3AV3BV4CCDOUT15471549154215441546154815501539154115431545315724682648101213579111315PBLKIDWENAFieldBFieldHD9181293412834918810810ABThenumberofSUBpulsesisdeterminedbytheserialinterfacedata.
ThischartshowsthecasewhereSUBpulsesareoutputineachhorizontalperiod.
IDislowforlineswhereCCDOUTcontainstheRcomponent,andhighforlineswhereCCDOUTcontainstheBcomponent.
VDofthischartisNTSCequivalentpattern(918H+1716ckunits).
ForPALequivalentpattern,itis945Hunits,but1208ckperiodonlyfor944Hand945H.
Chart-1VerticalDirectionTimingChartMODEFramemodeApplicableCCDimagesensorICX252/262–29–CXD3406GAVDHDSUBV1AV2V3AV3BV4CLPOBCLPDMIDPBLKV1BCCDOUT1510362227341381420546539534527544537532525549253210361522273481413202532546539534527544537532525549WEN2126226121262261DDThenumberofSUBpulsesisdeterminedbytheserialinterfacedata.
ThischartshowsthecasewhereSUBpulsesareoutputineachhorizontalperiod.
IDislowforlineswhereCCDOUTcontainstheRcomponent,andhighforlineswhereCCDOUTcontainstheBcomponent.
VDofthischartisNTSCequivalentpattern(262H+1144ckunits).
ForPALequivalentpattern,itis314H+1568ckunits.
Chart-2VerticalDirectionTimingChartMODEDraftmodeApplicableCCDimagesensorICX252/262–30–CXD3406GAVDCCDOUT6464WENHDIDCLPOBCLPDMPBLKV1AV1BV2V3BV4SUBV3A102518131102518131High-speedsweepblockHigh-speedsweepblockFrameshiftblockFDGFrameshiftblockFDGThenumberofSUBpulsesisdeterminedbytheserialinterfacedata.
ThischartshowsthecasewhereSUBpulsesareoutputineachhorizontalperiod.
IDislowforlineswhereCCDOUTcontainstheRcomponent,andhighforlineswhereCCDOUTcontainstheBcomponent.
138stagesarefixedforhigh-speedsweepblock;0to255stagescanbespecifiedbytheserialinterfacefortheframeshiftblock.
VDofthischartisNTSCequivalentpattern(131H+572ckunits).
ForPALequivalentpattern,itis157H+784ckunits.
Chart-3VerticalDirectionTimingChartMODEAF1modeApplicableCCDimagesensorICX252/262–31–CXD3406GAVDCCDOUT6464WENHDIDCLPOBCLPDMPBLKV1AV1BV2V3BV4SUBV3AFHigh-speedsweepblockFrameshiftblockDGFHigh-speedsweepblockFrameshiftblockDG142911265142911265ThenumberofSUBpulsesisdeterminedbytheserialinterfacedata.
ThischartshowsthecasewhereSUBpulsesareoutputineachhorizontalperiod.
IDislowforlineswhereCCDOUTcontainstheRcomponent,andhighforlineswhereCCDOUTcontainstheBcomponent.
208stagesarefixedforhigh-speedsweepblock;0to255stagescanbespecifiedbytheserialinterfacefortheframeshiftblock.
VDofthischartisNTSCequivalentpattern(65H+1430ckunits).
ForPALequivalentpattern,itis78H+1536ckunits.
Chart-4VerticalDirectionTimingChartMODEAF2modeApplicableCCDimagesensorICX252/262–32–CXD3406GA148HDMCKOH1H2V1A/BV2V3A/BV4SUBPBLKCLPOBCLPDM(2288)0505210015011070994710174905270200250IDWEN19817219815712811011013852HDofthischartindicatestheactualCXD3406GAloadtiming.
ThenumbersattheoutputpulsetransitionpointsindicatethecountattheMCKOrisefromthefallofHD.
TheHDfallperiodshouldbebetweenapproximately2.
9to9.
5s(whenthedrivefrequencyis18MHz).
Thischartshowsaperiodof115ck(6.
4s).
InternalSSGisatthistiming.
SUBisoutputatthistimingshownabovewhenoutputiscontrolledbytheserialinterfacedata.
IDandWENareoutputatthistimingshownaboveatthepositionshowninChart-1.
Chart-5HorizontalDirectionTimingChartMODEFramemodeApplicableCCDimagesensorICX252/262–33–CXD3406GAHDMCKOH1H2V1A/BV2V3A/BV4SUBPBLKCLPOBCLPDM(2288)05052100150701069366471017452200250IDWEN198172198841207511011014052887910215111114797156129115617114257138124133HDofthischartindicatestheactualCXD3406GAloadtiming.
ThenumbersattheoutputpulsetransitionpointsindicatethecountattheMCKOrisefromthefallofHD.
TheHDfallperiodshouldbebetweenapproximately2.
9to9.
5s(whenthedrivefrequencyis18MHz).
Thischartshowsaperiodof115ck(6.
4s).
InternalSSGisatthistiming.
SUBisoutputatthistimingshownabovewhenoutputiscontrolledbytheserialinterfacedata.
IDandWENareoutputatthistimingshownaboveatthepositionshowninCharts-2,3and4.
Chart-6HorizontalDirectionTimingChartMODEDraft/AF1/AF2modeApplicableCCDimagesensorICX252/262–34–CXD3406GAHDMCKOH1H2V1A/BV2V3A/BV4SUBPBLKCLPOBCLPDM(2288)05052100150521391101977170200250IDWEN1721001291385281100129110168187274158168226158139#4#3#2#18125527424521618771216245197255226HDofthischartindicatestheactualCXD3406GAloadtiming.
ThenumbersattheoutputpulsetransitionpointsindicatethecountattheMCKOrisefromthefallofHD.
TheHDfallperiodshouldbebetweenapproximately2.
9to9.
5s(whenthedrivefrequencyis18MHz).
Thischartshowsaperiodof115ck(6.
4s).
InternalSSGisatthistiming.
SUBisoutputatthistimingshownabovewhenoutputiscontrolledbytheserialinterfacedata.
High-speedsweepofV1A/B,V2,V3A/BandV4isperformedupto26Hof768ck(#1038).
Chart-7HorizontalDirectionTimingChart(High-speedsweep:C)MODEFramemodeApplicableCCDimagesensorICX252/262–35–CXD3406GAHDMCKOH1H2V1A/BV2V3A/BV4SUBPBLKCLPOBCLPDM(2288)0505210015071521099014764471052200250IDWEN172831211407110511014052901288310214015919725410914716610215917821622326128027312820424212123527326121622317818516664185204242197#2#123525421971HDofthischartindicatestheactualCXD3406GAloadtiming.
ThenumbersattheoutputpulsetransitionpointsindicatethecountattheMCKOrisefromthefallofHD.
TheHDfallperiodshouldbebetweenapproximately2.
9to9.
5s(whenthedrivefrequencyis18MHz).
Thischartshowsaperiodof115ck(6.
4s).
InternalSSGisatthistiming.
SUBisoutputatthistimingshownabovewhenoutputiscontrolledbytheserialinterfacedata.
WENisoutputatthistimingshownaboveatthepositionshowninChart-3and4.
High-speedsweepofV1A/B,V2,V3A/BandV4isperformedupto6Hof2056ck(#138)inAF1modeand10Hof884ck(#208)inAF2mode.
FrameshiftofV1A/B,V2,V3A/BandV4receivestheoutputcontrolbytheserialinterfacedataandcanspecifyupto#255forbothofAF1/AF2mode.
IDisoutputatthetimingshownwithdottedlineduringframeshift.
Chart-8HorizontalDirectionTimingChart(High-speedsweep:F)(Frameshift:G)MODEAF1/AF2modeApplicableCCDimagesensorICX252/262–36–CXD3406GAHD[AField][BField][A][B]V3BV4V3BV4V1AV1BV2V3AV1AV1BV2V3A(2288)052701109012899148157181211241(2288)0527012890148991101571100113011601190128013101250LogicalignmentportionHDofthischartindicatestheactualCXD3406GAloadtiming.
ThenumbersattheoutputpulsetransitionpointsindicatethecountattheMCKOrisefromthefallofHD.
TheHDfallperiodshouldbebetweenapproximately2.
9to9.
5s(whenthedrivefrequencyis18MHz).
Thischartshowsaperiodof115ck(6.
4s).
InternalSSGisatthistiming.
Chart-9HorizontalDirectionTimingChartMODEFramemodeApplicableCCDimagesensorICX252/262–37–CXD3406GA52576166707579848893971021061111151201241291331381421471511565257616670757984889397102106111115120124129133138142147151156HD[D]V3BV4V1AV1BV2V3A(2288)0(2288)0113011601190101010401070110012201250128013101340137014001430HDofthischartindicatestheactualCXD3406GAloadtiming.
ThenumbersattheoutputpulsetransitionpointsindicatethecountattheMCKOrisefromthefallofHD.
TheHDfallperiodshouldbebetweenapproximately2.
9to9.
5s(whenthedrivefrequencyis18MHz).
Thischartshowsaperiodof115ck(6.
4s).
InternalSSGisatthistiming.
Chart-10HorizontalDirectionTimingChartMODEDraft/AF1/AF2modeApplicableCCDimagesensorICX252/262–38–CXD3406GAChart-11High-SpeedPhaseTimingChartMODEApplicableCCDimagesensorICX252/262HDHD'CKICKOADCLKMCKOH1H2RGXSHPXSHDXRS172521HD'indicatestheHDwhichistheactualCXD3406GAloadtiming.
Thephaserelationshipofeachpulseshowsthelogicalpositionrelationship.
Fortheactualoutputwaveform,adelayisaddedtoeachpulse.
ThelogicalphaseofADCLKcanbespecifiedbytheserialinterfacedata.
–39–CXD3406GAChart-12VerticalDirectionSequenceChartMODEDraft→Frame→DraftApplicableCCDimagesensorICX252/262VDV1AV1BV2V3AV3BV4SUBMechanicalshutterExposuretimeCCDOUTMODESMDSHDCloseOpenABCEEF000003300010101010100000101050h050h050h050h050h000h000h050h050hABCDEFThischartisadrivingtimingchartexampleofelectronicshutternormaloperation.
DataexposedatDincludesbloomingcomponent.
Fordetails,seetheCCDimagesensorDataSheet.
TheCXD3406GAdoesnotgeneratethepulsetocontrolmechanicalshutteroperation.
Theswitchingtimingofthedrivemodeandtheelectronicshutterdataisnotthesame.
–40–CXD3406GACCDSignalProcessorBlockSerialInterfaceControlTheCXD3406GA'sCCDsignalprocessorblockbasicallyloadstheCCDsignalprocessorblockserialinterfacedatasentinthefollowingformatattherisingedgeofSEN2,andthesettingvaluesarethenreflectedtotheoperation6ADCLKIclocksafterthat.
CCDsignalprocessorblockserialinterfacecontrolrequiresclockinputtoADCLKIinordertoloadandreflecttheserialinterfacedatatooperation,sothisshouldnormallybeperformedwhenthetiminggeneratorblockisinthenormaloperationmode.
00010203040506070809101112131415SSI2SCK2SEN2TherearefourcategoriesofCCDsignalprocessorblockserialinterfacedata:standbycontroldata,PGAgainsettingdata,OBclamplevelsettingdata,andinputpulsepolaritysettingdata.
Notethatwhendatafrommultiplecategoriesisloadedconsecutively,thedataforthecategoryloadedlastisvalidanddatafromothercategoriesislost.
Whentransferringdatafrommultiplecategories,raiseSEN2foreachcategoryandwaituntilthesettingvalue6ADCKLIclocksafterthathasbeenreflectedtooperation,thentransmitthenextcategory.
Thedetailofeachdataaredescribedbelow.
StandbyControlDataDataD00D01toD03D04toD14D15SymbolTESTCTGFIXEDSTBFunctionTestcodeCategoryswitching—StandbycontrolData=0Data=1Setto0.
D01toD03CTGSettoAll0.
NormaloperatingmodeStandbymodeDataD00D01toD03D04toD05D06toD15SymbolTESTCTGFIXEDGAINFunctionTestcodeCategoryswitching—PGAgainsettingdataData=0Data=1Setto0.
D01toD03CTGSettoAll0.
SeeD06toD15GAIN.
PGAGainSettingData–41–CXD3406GADataD00D01toD03D04toD11D12toD15SymbolTESTCTGFIXEDOBLVLFunctionTestcodeCategoryswitching—OBclamplevelsettingdataData=0Data=1Setto0.
D01toD03CTGSettoAll0.
SeeD12toD15OBLVL.
OBClampLevelSettingDataDataD00D01toD03D04toD12D13toD15SymbolTESTCTGFIXEDPOLFunctionTestcodeCategoryswitching—InputpulsepolaritysettingdataData=0Data=1Setto0.
D01toD03CTGSettoAll0.
SettoAll0.
InputPulsePolaritySettingData–42–CXD3406GADetailedDescriptionofEachDataShareddata:D01toD03CTG[Category]OfthedataprovidedtotheCXD3406GAbytheCCDsignalprocessorblockserialinterface,theCXD3406GAloadsD04andsubsequentdatatoeachdataregisterasshowninthetablebelowaccordingtothecombinationofD01toD03.
PGAgainsettingdata:D06toD15GAIN[PGAgain]TheCXD3406GAcansettheprogrammablegainamplifier(PGA)gainfrom–6dBto+42dBin1024stepsbyusingPGAgainsettingdataD06toD15GAIN.
ThePGAgainsettingdataisexpressedasshowninthetablebelowusingD06toD15GAIN.
D0100001D020011XD030101XDescriptionofoperationLoadingtostandbycontroldataregisterLoadingtoPGAgainsettingdataregisterLoadingtoOBclamplevelsettingdataregisterLoadingtoinputpulsepolaritysettingdataregisterAccessprohibitedStandbycontroldata:D15STB[Standby]TheoperatingmodeoftheCCDsignalprocessorblockisswitchedasfollows.
WhentheCCDsignalprocessorblockisinstandbymode,onlytheserialinterfaceisvalid.
D1501DescriptionofoperationNormaloperatingmodeStandbymodeMSBLSBD06D07D08D09D10D11D12D13D14D151100↓C01↓10011↓3GAINisexpressedas1C3h.
Forexample,whenGAINissetto"000h","080h","220h","348h"and"3FFh",therespectivePGAgainsettingvaluesare–6dB,0dB,+20dB,+34dBand+42dB.
–43–CXD3406GAOBclamplevelsettingdata:D12toD15OBLVL[OBclamplevel]TheCXD3406GAcansettheOPBclampoutputvaluefrom0to60LSBin4LSBstepsbyusingCCDsignalprocessorblockcontroldataD12toD15OBLVL.
TheOPBclampoutputsettingdataisexpressedasshowninthetablebelowusingD12toD15OBLVL.
MSBLSBD12D13D14D150110↓6OBLVLisexpressedas6h.
Forexample,whenOBLVLissetto"0h","1h","8h"and"Fh",therespectiveOPBclampoutputsettingvaluesare0LSB,4LSB,32LSBand60LSB.
–44–CXD3406GAApplicationCircuitBlockDiagramSEN2SCK2SSI2F9F8F7G2G3G9G8G7H2H1G1B7A7C6B3A1A2B2B1C3C2C1D3D2D1E1J2K2M2N2N9M9M8N8L8M4N5L5K8J9J8C8C7D8D7C9N4L5N7N6A3B4A4M1N1L2B5C4L1J1K1A5M7M3H3CCDICX252/262TG/CDS/PGA/ADCCXD3406GAControllerSSI1SEN1SCK1TEST5TEST4TEST3TEST2TEST1OSCOCKIOSCID1VDHDD0(LSB)SignalProcessorBlockD2NCNCD3D4D5D6D7D8D9(MSB)MCKOCKOSSGSLSNCSLRSTWENID0.
1FC7XSHPIXSHDIPBLKICLPDMICLPOBIXSHPXSHDPBLKCLPDMCLPOBADCLKADCLKI0.
1FC80.
1FC91FC11FCCDINCCDOUT390pFC2390pFC3240pFC4H1H2RGV1AV1BV2V3AV3BV4SUBApplicationcircuitsshownaretypicalexamplesillustratingtheoperationofthedevices.
Sonycannotassumeresponsibilityforanyproblemsarisingoutoftheuseofthesecircuitsorforanyinfringementofthirdpartypatentandotherrightduetosame.
Thisblockdiagramillustratesconnectionswitheachcircuitblock,andisnotanactualcircuitdiagram.
SeetheCCDimagesensordatasheetforanexampleofspecificcircuitconnectionswiththeCCDimagesensor.
–45–CXD3406GANotesonOperation1.
BesuretostartupthetiminggeneratorblockVLandVHpinpowersuppliesatthetimingshowninthefigurebelowinordertopreventtheSUBpinoftheCCDimagesensorfromgoingtonegativepotential.
Inaddition,startupthetiminggeneratorblockVDD1,VDD2,VDD3,VDD4andVDD5pinandCCDsignalprocessorblockDVDD1,DVDD2,AVDD1,AVDD2,AVDD3,AVDD4andAVDD5pinpowersuppliesatthesametimeeitherbeforeoratthesametimeastheVHpinpowersupplyisstartedup.
2.
ResetthetiminggeneratorblockandCCDsignalprocessorblockduringpower-on.
ThetiminggeneratorblockisresetbyinputtingtheresetsignaltotheRSTpin.
TheCCDsignalprocessorblockisresetbyinitializingtheserialdata.
3.
SeparatethetiminggeneratorblockVDD1,VDD2,VDD3,VDD4andVDD5pinsfromtheCCDsignalprocessorblockDVDD1,DVDD2,AVDD1,AVDD2,AVDD3,AVDD4andAVDD5pins.
Also,theADCoutputdriverstageisconnectedtothededicatedpowersupplypinDVDD1.
Separatingthispinfromotherpowersuppliesisrecommendedtoavoidaffectingtheinternalanalogcircuits.
4.
ThedifferenceinpotentialbetweenthetiminggeneratorblockVDD4pinsupplyvoltage3VDDcandtheCCDsignalprocessorblockDVDD1,DVDD2,AVDD1,AVDD2,AVDD3,AVDD4andAVDD5pinsupplyvoltages1VDDe,2VDDfand3VDDgshouldbe0.
1Vorless.
5.
ThetiminggeneratorblockandCCDsignalprocessorblockgroundpinsshoulduseasharedgroundwhichisconnectedoutsidetheIC.
Whenthesetgroundisdividedintodigitalandanalogblocks,connectthetiminggeneratorblockgroundpinstothedigitalgroundandtheCCDsignalprocessorblockgroundpinstotheanalogground.
ThedifferenceinpotentialbetweenthetiminggeneratorblockVSS1,VSS2,VSS3,VSS4,VSS5,VSS6andVMandtheCCDsignalprocessorblockDVSS1,DVSS2,DVSS3,AVSS1,AVSS2,AVSS3,AVSS4,AVSS5andAVSS6shouldbe0.
1Vorless.
6.
DonotperformserialcommunicationwiththeCCDsignalprocessorblockduringtheeffectiveimageperiod,asthismaycausethepicturequalitytodeteriorate.
Inaddition,usingSCK2,SSI2andSEN2,whichareusedbytheCCDsignalprocessorblock,useofthededicatedportsisrecommended.
WhenusingthesepinsassharedportswiththetiminggeneratorblockorotherICs,besuretothoroughlyconfirmtheeffectsonpicturequalitybeforeuse.
t1t215.
0V0V–7.
5V20%20%t2≥t1–46–CXD3406GAPackageOutlineUnit:mm96PINLFLGAPACKAGEMASSPACKAGESTRUCTUREORGANICSUBSTRATE0.
3gPACKAGEMATERIALTERMINALTREATMENTTERMINALMATERIALGOLDPLATINGNICKELPLATINGSONYCODEEIAJCODEJEDECCODELFLGA-96P-02P-LFLGA96-12X8-0.
81.
3MAXS0.
10DETAILXSS0.
2PIN1INDEXXBB0.
212.
0S8.
0A0.
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8BDEFGHJKLCAMN1234567890.
8MSAB96-φ0.
45±0.
05A0.
50.
53–φ0.
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50.
90.
91.
20.
80.
10MAX0.
5φ0.
08(0.
3)(0.
3)(0.
3)(0.
3)SonyCorporation96PINLFLGAPACKAGEMASSPACKAGESTRUCTUREORGANICSUBSTRATE0.
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0-0.
81.
3MAXS0.
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15x40.
8BDEFGHJKLCAMN1234567890.
8MSAB96-φ0.
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500.
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90.
91.
20.
80.
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5φ0.
08(0.
3)(0.
3)(0.
3)(0.
3)NICKEL&GOLDPLATINGCOPPEROitaAss'yHITACHITOKYOAss'y