1f20;BACKGROUND-COLOR:#4ae2f7">16-bit

I2C-busandSMBusI/OportwithinterruptPI4IOE5V9535www.
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3Vto5.
5V1f20;BACKGROUND-COLOR:#4ae2f7">16-bitI/OpinswhichcanbeprogrammedasInputorOutput5VtolerantI/OsPolarityinversionregisterActiveLOWinterruptoutputLowcurrentconsumption0Hzto400KHzclockfrequencyNoisefilteronSCL/SDAinputsPower-onresetESDprotection(4KVHBMand1f20;BACKGROUND-COLOR:#4ae2f7">1KVCDM)Latch-uptested(exceeds1f20;BACKGROUND-COLOR:#4ae2f7">100mA)Offeredintwodifferentpackages:TSSOP-24andTQFN4x4-24DescriptionThePI4IOE5V9535isa24-pindevicethatprovides1f20;BACKGROUND-COLOR:#4ae2f7">16bitsofGeneralPurposeparallelInput/Output(GPIO)expansionforI2C-bus/SMBusapplicationsItincludesthefeaturessuchashigherdrivingcapability,5Vtolerance,lowerpowersupply,individualI/Oconfiguration,andsmallerpackaging.
ItprovidesasimplesolutionwhenadditionalI/OisneededforACPIpowerswitches,sensors,pushbuttons,LEDs,fans,etc.
ThePI4IOE5V9535consistsoftwo8-bitConfiguration(InputorOutputselection),Input,OutputandPolarityInversion(activeHIGHoractiveLOWoperation)registers.
ThesystemmastercanenabletheI/OsaseitherinputsoroutputsbywritingtotheI/Oconfigurationbits.
ThedataforeachinputoroutputiskeptinthecorrespondingInputportorOutputportregister.
ThepolarityofthereadregistercanbeinvertedwiththePolarityInversionregister.
Allregisterscanbereadbythesystemmaster.
ThePI4IOE5V9535isidenticaltothePI4IOE5V9555exceptfortheremovaloftheinternalI/Opull-upresistorwhichgreatlyreducespowerconsumptionwhentheI/OsareheldLOW.
ThePI4IOE5V9535open-draininterruptoutputisactivatedwhenanyinputstatediffersfromitscorrespondingInputPortregisterstateandisusedtoindicatetothesystemmasterthataninputstatehaschanged.
Thepower-onresetsetstheregisterstotheirdefaultvaluesandinitializesthedevicestatemachine.
Threehardwarepins(A0,A1f20;BACKGROUND-COLOR:#4ae2f7">1,A2)varythefixedI2C-busaddressandallowuptoeightdevicestosharethesameI2C-bus/SMBus.
ThefixedI2C-busaddressofthePI4IOE5V9535arethesameasthePI4IOE5V9535allowinguptoeightofthesedevicesinanycombinationtosharethesameI2C-bus/SMBus.
PinConfigurationFigure1f20;BACKGROUND-COLOR:#4ae2f7">1:TSSOP-24(TopView)Figure2:TQFN4x4-24(TopView)PI4IOE5V9535www.
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comDecember201f20;BACKGROUND-COLOR:#4ae2f7">17DocumentNumberDS40531f20;BACKGROUND-COLOR:#4ae2f7">1Rev1f20;BACKGROUND-COLOR:#4ae2f7">1-22DiodesIncorporatedPI4IOE5V9535PinDescriptionTable1f20;BACKGROUND-COLOR:#4ae2f7">1:PinDescriptionPinNameTypeDescriptionTSSOP24TQFN241f20;BACKGROUND-COLOR:#4ae2f7">122INTOInterruptinput(open-drain)223A1f20;BACKGROUND-COLOR:#4ae2f7">1IAddressinput1f20;BACKGROUND-COLOR:#4ae2f7">1324A2IAddressinput241f20;BACKGROUND-COLOR:#4ae2f7">1IO0_0I/OPort0input/output052IO0_1f20;BACKGROUND-COLOR:#4ae2f7">1I/OPort0input/output1f20;BACKGROUND-COLOR:#4ae2f7">163IO0_2I/OPort0input/output274IO0_3I/OPort0input/output385IO0_4I/OPort0input/output496IO0_5I/OPort0input/output51f20;BACKGROUND-COLOR:#4ae2f7">107IO0_6I/OPort0input/output61f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">18IO0_7I/OPort0input/output71f20;BACKGROUND-COLOR:#4ae2f7">129GNDGGround1f20;BACKGROUND-COLOR:#4ae2f7">131f20;BACKGROUND-COLOR:#4ae2f7">10IO1f20;BACKGROUND-COLOR:#4ae2f7">1_0I/OPort1f20;BACKGROUND-COLOR:#4ae2f7">1input/output01f20;BACKGROUND-COLOR:#4ae2f7">141f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1IO1f20;BACKGROUND-COLOR:#4ae2f7">1_1f20;BACKGROUND-COLOR:#4ae2f7">1I/OPort1f20;BACKGROUND-COLOR:#4ae2f7">1input/output1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">151f20;BACKGROUND-COLOR:#4ae2f7">12IO1f20;BACKGROUND-COLOR:#4ae2f7">1_2I/OPort1f20;BACKGROUND-COLOR:#4ae2f7">1input/output21f20;BACKGROUND-COLOR:#4ae2f7">161f20;BACKGROUND-COLOR:#4ae2f7">13IO1f20;BACKGROUND-COLOR:#4ae2f7">1_3I/OPort1f20;BACKGROUND-COLOR:#4ae2f7">1input/output31f20;BACKGROUND-COLOR:#4ae2f7">171f20;BACKGROUND-COLOR:#4ae2f7">14IO1f20;BACKGROUND-COLOR:#4ae2f7">1_4I/OPort1f20;BACKGROUND-COLOR:#4ae2f7">1input/output41f20;BACKGROUND-COLOR:#4ae2f7">181f20;BACKGROUND-COLOR:#4ae2f7">15IO1f20;BACKGROUND-COLOR:#4ae2f7">1_5I/OPort1f20;BACKGROUND-COLOR:#4ae2f7">1input/output51f20;BACKGROUND-COLOR:#4ae2f7">191f20;BACKGROUND-COLOR:#4ae2f7">16IO1f20;BACKGROUND-COLOR:#4ae2f7">1_6I/OPort1f20;BACKGROUND-COLOR:#4ae2f7">1input/output6201f20;BACKGROUND-COLOR:#4ae2f7">17IO1f20;BACKGROUND-COLOR:#4ae2f7">1_7I/OPort1f20;BACKGROUND-COLOR:#4ae2f7">1input/output721f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">18A0IAddressinput0221f20;BACKGROUND-COLOR:#4ae2f7">19SCLISerialclocklineinput2320SDAISerialdatalineopen-drain2421f20;BACKGROUND-COLOR:#4ae2f7">1VCCPSupplyvoltage*I=Input;O=Output;P=Power;G=GroundPI4IOE5V9535www.
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comDecember201f20;BACKGROUND-COLOR:#4ae2f7">17DocumentNumberDS40531f20;BACKGROUND-COLOR:#4ae2f7">1Rev1f20;BACKGROUND-COLOR:#4ae2f7">1-23DiodesIncorporatedPI4IOE5V9535MaximumRatingsPowersupply.
0.
5Vto+6.
0VVoltageonanI/Opin.
GND-0.
5Vto+6.
0VInputcurrent.
20MaOutputcurrentonanI/Opin50mASupplycurrent.
1f20;BACKGROUND-COLOR:#4ae2f7">150mAGroundsupplycurrent.
200mATotalpowerdissipation.
200mWOperationtemperature.
40~85℃Storagetemperature65~1f20;BACKGROUND-COLOR:#4ae2f7">150℃MaximumJunctiontemperature,Tj(max)1f20;BACKGROUND-COLOR:#4ae2f7">125℃StaticcharacteristicVCC=2.
3Vto5.
5V;GND=0V;Tamb=-40°Cto+85°C;unlessotherwisespecified.
Table2:StaticcharacteristicSymbolParameterConditionsMin.
Typ.
Max.
UnitPowersupplyVCCSupplyvoltage2.
3-5.
5VICCSupplycurrentOperatingmode;VCC=5.
5V;noload;fSCL=400kHz-4060μAOperatingmode;VCC=2.
3V;noload;fSCL=400kHz1f20;BACKGROUND-COLOR:#4ae2f7">1020μAIstbStandbycurrentStandbymode;VCC=5.
5V;noload;VI=GND;fSCL=0kHz;I/O=inputs-0.
251f20;BACKGROUND-COLOR:#4ae2f7">1uAStandbymode;VCC=5.
5V;noload;VI=VCC;fSCL=0kHz;I/O=inputs-0.
251f20;BACKGROUND-COLOR:#4ae2f7">1uAVPORPower-onresetvoltage[1f20;BACKGROUND-COLOR:#4ae2f7">1]-1f20;BACKGROUND-COLOR:#4ae2f7">1.
1f20;BACKGROUND-COLOR:#4ae2f7">161f20;BACKGROUND-COLOR:#4ae2f7">1.
41f20;BACKGROUND-COLOR:#4ae2f7">1VInputSCL,input/outputSDAVILLowlevelinputvoltage-0.
5-+0.
3VCCVVIHHighlevelinputvoltage0.
7VCC-5.
5VIOLLowleveloutputcurrentVOL=0.
4V3--mAILLeakagecurrentVI=VCC=GND-1f20;BACKGROUND-COLOR:#4ae2f7">1-1f20;BACKGROUND-COLOR:#4ae2f7">1μACiInputcapacitanceVI=GND-61f20;BACKGROUND-COLOR:#4ae2f7">10pFNote:StressesgreaterthanthoselistedunderMAXIMUMRATINGSmaycausepermanentdamagetothedevice.
Thisisastressratingonlyandfunctionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionsofthisspecificationisnotimplied.
Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectreliability.
PI4IOE5V9535www.
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comDecember201f20;BACKGROUND-COLOR:#4ae2f7">17DocumentNumberDS40531f20;BACKGROUND-COLOR:#4ae2f7">1Rev1f20;BACKGROUND-COLOR:#4ae2f7">1-24DiodesIncorporatedPI4IOE5V9535StaticCharacteristicCont.
SymbolParameterConditionsMin.
Typ.
Max.
UnitI/OsVILLowlevelinputvoltage-0.
5-+0.
81f20;BACKGROUND-COLOR:#4ae2f7">1VVIHHighlevelinputvoltage+1f20;BACKGROUND-COLOR:#4ae2f7">1.
8-5.
5VIOLLowleveloutputcurrentVCC=2.
3Vto5.
5V;VOL=0.
5V[2]81f20;BACKGROUND-COLOR:#4ae2f7">10-mAVCC=2.
3Vto5.
5V;VOL=0.
7V[2]1f20;BACKGROUND-COLOR:#4ae2f7">101f20;BACKGROUND-COLOR:#4ae2f7">14-mAVOHHighleveloutputvoltageIOH=-8mA;VCC=2.
3V[3]1f20;BACKGROUND-COLOR:#4ae2f7">1.
8--VIOH=-1f20;BACKGROUND-COLOR:#4ae2f7">10mA;VCC=2.
3V[3]1f20;BACKGROUND-COLOR:#4ae2f7">1.
7--VIOH=-8mA;VCC=3.
0V[3]2.
6--VIOH=-1f20;BACKGROUND-COLOR:#4ae2f7">10mA;VCC=3.
0V[3]2.
5--VIOH=-8mA;VCC=4.
75V[3]4.
1f20;BACKGROUND-COLOR:#4ae2f7">1--VIOH=-1f20;BACKGROUND-COLOR:#4ae2f7">10mA;VCC=4.
75V[3]4.
0--VILIHHighlevelinputleakagecurrentVCC=5.
5V;VI=VCC--1f20;BACKGROUND-COLOR:#4ae2f7">1μAILILLowlevelinputleakagecurrentVCC=5.
5V;VI=GND---1f20;BACKGROUND-COLOR:#4ae2f7">1μACiInputcapacitance-3.
71f20;BACKGROUND-COLOR:#4ae2f7">10pFCoOutputcapacitance-3.
71f20;BACKGROUND-COLOR:#4ae2f7">10pFInterruptINTIOLLowleveloutputcurrentVOL=0.
4V3--mASelectinputsA0,A1f20;BACKGROUND-COLOR:#4ae2f7">1,A2VILLowlevelinputvoltage-0.
5-+0.
81f20;BACKGROUND-COLOR:#4ae2f7">1VVIHHighlevelinputvoltage+1f20;BACKGROUND-COLOR:#4ae2f7">1.
8-5.
5VILInputleakagecurrent-1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1μANote:[1f20;BACKGROUND-COLOR:#4ae2f7">1]:VCCmustbeloweredto0.
2Vforatleast20usinordertoresetpart.
[2]:EachI/Omustbeexternallylimitedtoamaximumof25mAandeachoctal(IO0_0toIO0_7andIO1f20;BACKGROUND-COLOR:#4ae2f7">1_0toIO1f20;BACKGROUND-COLOR:#4ae2f7">1_7)mustbelimitedtoamaximumcurrentof1f20;BACKGROUND-COLOR:#4ae2f7">100mAforadevicetotalof200mA.
[3]:ThetotalcurrentsourcedbyallI/Osmustbelimitedto1f20;BACKGROUND-COLOR:#4ae2f7">160mA.
PI4IOE5V9535www.
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7-1f20;BACKGROUND-COLOR:#4ae2f7">1.
3-μstHD;STAholdtime(repeated)STARTcondition4.
0-0.
6-μstSU;STAset-uptimeforarepeatedSTARTcondition4.
7-0.
6-μstSU;STOset-uptimeforSTOPcondition4.
0-0.
6-μstVD;ACK[1f20;BACKGROUND-COLOR:#4ae2f7">1]datavalidacknowledgetime-3.
45-0.
9μstHD;DAT[2]dataholdtime0-0-nstVD;DATdatavalidtime-3.
45-0.
9μstSU;DATdataset-uptime250-1f20;BACKGROUND-COLOR:#4ae2f7">100-nstLOWLOWperiodoftheSCLclock4.
7-1f20;BACKGROUND-COLOR:#4ae2f7">1.
3-μstHIGHHIGHperiodoftheSCLclock4.
0-0.
6-μstffalltimeofbothSDAandSCLsignals-300-300nstrrisetimeofbothSDAandSCLsignals-1f20;BACKGROUND-COLOR:#4ae2f7">1000-300nstSPpulsewidthofspikesthatmustbesuppressedbytheinputfilter-50-50nsPorttimingtv(Q)Dataoutputvalidtime[3]-200-200nstsu(D)Datainputset-uptime1f20;BACKGROUND-COLOR:#4ae2f7">150-1f20;BACKGROUND-COLOR:#4ae2f7">150-nsth(D)Datainputholdtime1f20;BACKGROUND-COLOR:#4ae2f7">1-1f20;BACKGROUND-COLOR:#4ae2f7">1-μsInterrupttimingtv(INT)ValidtimeonpinINT-4-4μstrst(INT)ResettimeonpinINT-4-4μsNote:[1f20;BACKGROUND-COLOR:#4ae2f7">1]:tVD;ACK=timeforacknowledgementsignalfromSCLLOWtoSDA(out)LOW.
[2]:tVD;DAT=minimumtimeforSDAdataouttobevalidfollowingSCLLOW.
[3]:tv(Q)measuredfrom0.
7VCConSCLto50%I/Ooutput.
PI4IOE5V9535www.
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PI4IOE5V9535www.
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Deviceaddressb7(MSB)b6b5b4b3b2b1f20;BACKGROUND-COLOR:#4ae2f7">1b0AddressByte01f20;BACKGROUND-COLOR:#4ae2f7">100A2A1f20;BACKGROUND-COLOR:#4ae2f7">1A0R/WNote:Read"1f20;BACKGROUND-COLOR:#4ae2f7">1",Write"0"b.
Registersi.
CommandbyteThecommandbyteisthefirstbytetofollowtheaddressbyteduringawritetransmission.
Itisusedasapointertodeterminewhichofthefollowingregisterswillbewrittenorread.
Table4:CommandbyteCommandRegister0Inputport01f20;BACKGROUND-COLOR:#4ae2f7">1Inputport1f20;BACKGROUND-COLOR:#4ae2f7">12Outputport03Outputport1f20;BACKGROUND-COLOR:#4ae2f7">14Polarityinversionport05Polarityinversionport1f20;BACKGROUND-COLOR:#4ae2f7">16Configurationport07Configurationport1f20;BACKGROUND-COLOR:#4ae2f7">1PI4IOE5V9535www.
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Register0and1f20;BACKGROUND-COLOR:#4ae2f7">1:inputportregistersThisregisterisaread-onlyport.
Itreflectstheincominglogiclevelsofthepins,regardlessofwhetherthepinisdefinedasaninputoranoutputbyRegister3.
Writestothisregisterhavenoeffect.
Thedefaultvalue'X'isdeterminedbytheexternallyappliedlogiclevel.
Table5:Inputport0registerBit7654321f20;BACKGROUND-COLOR:#4ae2f7">10SymbolI0.
7I0.
6I0.
5I0.
4I0.
3I0.
2I0.
1f20;BACKGROUND-COLOR:#4ae2f7">1I0.
0DefaultXXXXXXXXTable6:Inputport1f20;BACKGROUND-COLOR:#4ae2f7">1registerBit7654321f20;BACKGROUND-COLOR:#4ae2f7">10SymbolI1f20;BACKGROUND-COLOR:#4ae2f7">1.
7I1f20;BACKGROUND-COLOR:#4ae2f7">1.
6I1f20;BACKGROUND-COLOR:#4ae2f7">1.
5I1f20;BACKGROUND-COLOR:#4ae2f7">1.
4I1f20;BACKGROUND-COLOR:#4ae2f7">1.
3I1f20;BACKGROUND-COLOR:#4ae2f7">1.
2I1f20;BACKGROUND-COLOR:#4ae2f7">1.
1f20;BACKGROUND-COLOR:#4ae2f7">1I1f20;BACKGROUND-COLOR:#4ae2f7">1.
0DefaultXXXXXXXXiii.
Register2and3:OutputportregistersThisregisterisanoutput-onlyport.
ItreflectstheoutgoinglogiclevelsofthepinsdefinedasoutputsbyRegisters6and7.
Bitvaluesinthisregisterhavenoeffectonpinsdefinedasinputs.
Inturn,readsfromthisregisterreflectthevaluethatisintheflip-flopcontrollingtheoutputselection,nottheactualpinvalue.
Table7:Outputport0registerBit7654321f20;BACKGROUND-COLOR:#4ae2f7">10SymbolO0.
7O0.
6O0.
5O0.
4O0.
3O0.
2O0.
1f20;BACKGROUND-COLOR:#4ae2f7">1O0.
0Default1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1Table8:Outputport1f20;BACKGROUND-COLOR:#4ae2f7">1registerBit7654321f20;BACKGROUND-COLOR:#4ae2f7">10SymbolO1f20;BACKGROUND-COLOR:#4ae2f7">1.
7O1f20;BACKGROUND-COLOR:#4ae2f7">1.
6O1f20;BACKGROUND-COLOR:#4ae2f7">1.
5O1f20;BACKGROUND-COLOR:#4ae2f7">1.
4O1f20;BACKGROUND-COLOR:#4ae2f7">1.
3O1f20;BACKGROUND-COLOR:#4ae2f7">1.
2O1f20;BACKGROUND-COLOR:#4ae2f7">1.
1f20;BACKGROUND-COLOR:#4ae2f7">1O1f20;BACKGROUND-COLOR:#4ae2f7">1.
0Default1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1iv.
Register4and5:PolarityinversionregistersThisregisterallowstheusertoinvertthepolarityoftheInputportregisterdata.
Ifabitinthisregisterisset(writtenwith'1f20;BACKGROUND-COLOR:#4ae2f7">1'),theInputportdatapolarityisinverted.
Ifabitinthisregisteriscleared(writtenwitha'0'),theInputportdatapolarityisretained.
Table9:PolarityInversionport0registerBit7654321f20;BACKGROUND-COLOR:#4ae2f7">10SymbolN0.
7N0.
6N0.
5N0.
4N0.
3N0.
2N0.
1f20;BACKGROUND-COLOR:#4ae2f7">1N0.
0Default00000000PI4IOE5V9535www.
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7N1f20;BACKGROUND-COLOR:#4ae2f7">1.
6N1f20;BACKGROUND-COLOR:#4ae2f7">1.
5N1f20;BACKGROUND-COLOR:#4ae2f7">1.
4N1f20;BACKGROUND-COLOR:#4ae2f7">1.
3N1f20;BACKGROUND-COLOR:#4ae2f7">1.
2N1f20;BACKGROUND-COLOR:#4ae2f7">1.
1f20;BACKGROUND-COLOR:#4ae2f7">1N1f20;BACKGROUND-COLOR:#4ae2f7">1.
0Default00000000v.
Register6and7:ConfigurationregistersThisregisterconfiguresthedirectionsoftheI/Opins.
Ifabitinthisregisterisset(writtenwith'1f20;BACKGROUND-COLOR:#4ae2f7">1'),thecorrespondingportpinisenabledasaninputwithhigh-impedanceoutputdriver.
Ifabitinthisregisteriscleared(writtenwith'0'),thecorrespondingportpinisenabledasanoutput.
NotethatthereisahighvalueresistortiedtoVCCateachpin.
Atreset,theIOsareconfiguredasinputswithapull-uptoVCC.
Table1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1:Configurationport0registerBit7654321f20;BACKGROUND-COLOR:#4ae2f7">10SymbolC0.
7C0.
6C0.
5C0.
4C.
3C0.
2C0.
1f20;BACKGROUND-COLOR:#4ae2f7">1C0.
0Default1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1Table1f20;BACKGROUND-COLOR:#4ae2f7">12:Configurationport1f20;BACKGROUND-COLOR:#4ae2f7">1registerBit7654321f20;BACKGROUND-COLOR:#4ae2f7">10SymbolC1f20;BACKGROUND-COLOR:#4ae2f7">1.
7C1f20;BACKGROUND-COLOR:#4ae2f7">1.
6C1f20;BACKGROUND-COLOR:#4ae2f7">1.
5C1f20;BACKGROUND-COLOR:#4ae2f7">1.
4C1f20;BACKGROUND-COLOR:#4ae2f7">1.
3C1f20;BACKGROUND-COLOR:#4ae2f7">1.
2C1f20;BACKGROUND-COLOR:#4ae2f7">1.
1f20;BACKGROUND-COLOR:#4ae2f7">1C1f20;BACKGROUND-COLOR:#4ae2f7">1.
0Default1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1c.
Power-onresetWhenpowerisappliedtoVCC,aninternalpower-onresetholdsthePI4IOE5V9535inaresetconditionuntilVCChasreachedVPOR.
Atthatpoint,theresetconditionisreleasedandthePI4IOE5V9535registersandSMBusstatemachinewillinitializetotheirdefaultstates.
Thepower-onresettypicallycompletestheresetandenablesthepartbythetimethepowersupplyisaboveVPOR.
However,whenitisrequiredtoresetthepartbyloweringthepowersupply,itisnecessarytoloweritbelow0.
2V.
d.
I/OportWhenanI/Oisconfiguredasaninput,FETsQ1f20;BACKGROUND-COLOR:#4ae2f7">1andQ2areoff,creatingahigh-impedance.
.
TheinputvoltagemayberaisedaboveVCCtoamaximumof5.
5V.
IftheI/Oisconfiguredasanoutput,thenonPI4IOE5V9535eitherQ1f20;BACKGROUND-COLOR:#4ae2f7">1orQ2ison,dependingonthestateoftheOutputPortregister.
CareshouldbeexercisedifanexternalvoltageisappliedtoanI/Oconfiguredasanoutputbecauseofthelow-impedancepaththatexistsbetweenthepinandeitherVCCorGND.
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BusTransactioni.
WritingtotheportregistersDataistransmittedtothePI4IOE5V9535bysendingthedeviceaddressandsettingtheleastsignificantbittoalogic0.
Thecommandbyteissentaftertheaddressanddetermineswhichregisterwillreceivethedatafollowingthecommandbyte.
TheeightregisterswithinthePI4IOE5V9535areconfiguredtooperateasfourregisterpairs.
ThefourpairsareInputPorts,OutputPorts,PolarityInversionPorts,andConfigurationPorts.
Aftersendingdatatooneregister,thenextdatabytewillbesenttotheotherregisterinthepair.
Forexample,ifthefirstbyteissenttoOutputPort1f20;BACKGROUND-COLOR:#4ae2f7">1(register3),thenextbytewillbestoredinOutputPort0(register2).
Thereisnolimitationonthenumberofdatabytessentinonewritetransmission.
Inthisway,each8-bitregistermaybeupdatedindependentlyoftheotherregisters.
Figure5:SimplifiedschematicofI/OsAfterpower-onreset,allregistersreturntodefaultvalues.
Figure6:WritetooutputregistersPI4IOE5V9535www.
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ReadingtheportregistersInordertoreaddatafromthePI4IOE5V9535,thebusmastermustfirstsendthePI4IOE5V9535addresswiththeleastsignificantbitsettoalogic0.
Thecommandbyteissentaftertheaddressanddetermineswhichregisterwillbeaccessed.
Afterarestart,thedeviceaddressissentagain,butthistimetheleastsignificantbitissettoalogic1f20;BACKGROUND-COLOR:#4ae2f7">1.
DatafromtheregisterdefinedbythecommandbytewillthenbesentbythePI4IOE5V9535.
Dataisclockedintotheregisteronthefallingedgeoftheacknowledgeclockpulse.
Afterthefirstbyteisread,additionalbytesmaybereadbutthedatawillnowreflecttheinformationintheotherregisterinthepair.
Forexample,ifyoureadInputPort1f20;BACKGROUND-COLOR:#4ae2f7">1,thenthenextbytereadwouldbeInputPort0.
Thereisnolimitationonthenumberofdatabytesreceivedinonereadtransmissionbutthefinalbytereceived,thebusmastermustnotacknowledgethedata.
Figure7:WritetoconfigurationregistersFigure8:ReadfromregistersNote:TransfercanbestoppedatanytimebyaSTOPcondition.
PI4IOE5V9535www.
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InterruptoutputTheopen-draininterruptoutputisactivatedwhenoneoftheportpinschangesstateandthepinisconfiguredasaninput.
TheinterruptisdeactivatedwhentheinputreturnstoitspreviousstateortheInputPortregisterisread.
Apinconfiguredasanoutputcannotcauseaninterrupt.
Sinceeach8-bitportisreadindependently,theinterruptcausedbyPort0willnotbeclearedbyareadofPort1f20;BACKGROUND-COLOR:#4ae2f7">1ortheotherwayaround.
Note:ChanginganI/OfromanoutputtoaninputmaycauseafalseinterrupttooccurifthestateofthepindoesnotmatchthecontentsoftheInputPortregister.
Figure9:ReadInputportregisterNote:TransferofdatacanbestoppedatanymomentbyaSTOPcondition.
Whenthisoccurs,datapresentatthelatestacknowledgephaseisvalid(outputmode).
Itisassumedthatthecommandbytehaspreviouslybeensetto'00'(readInputPortregister).
PI4IOE5V9535www.
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IO0_0,IO0_4,IO0_5configuredasoutputs.
IO0_1f20;BACKGROUND-COLOR:#4ae2f7">1,IO0_2,IO0_3configuredasinputs.
IO0_6,IO0_7,andIO1f20;BACKGROUND-COLOR:#4ae2f7">1_0toIO1f20;BACKGROUND-COLOR:#4ae2f7">1_7configuredasinputs.
PI4IOE5V9535www.
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comDecember201f20;BACKGROUND-COLOR:#4ae2f7">17DocumentNumberDS40531f20;BACKGROUND-COLOR:#4ae2f7">1Rev1f20;BACKGROUND-COLOR:#4ae2f7">1-21f20;BACKGROUND-COLOR:#4ae2f7">14DiodesIncorporatedPI4IOE5V9535MinimizingICCwhentheI/OsareusedtocontrolLEDSWhentheI/OsareusedtocontrolLEDs,theyarenormallyconnectedtoVCCthrougharesistorasshowninFigure1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1.
SincetheLEDactsasadiode,whentheLEDisofftheI/OVIisabout1f20;BACKGROUND-COLOR:#4ae2f7">1.
2VlessthanVCC.
Thesupplycurrent,ICC,increasesasVIbecomeslowerthanVCC.
Designsneedminimizecurrentconsumption,suchasbatterypowerapplications,shouldconsidermaintainingtheI/OpinsgreaterthanorequaltoVCCwhentheLEDisoff.
Figure1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1showsahighvalueresistorinparallelwiththeLED.
Figure1f20;BACKGROUND-COLOR:#4ae2f7">12showsVCClessthantheLEDsupplyvoltagebyatleast1f20;BACKGROUND-COLOR:#4ae2f7">1.
2V.
BothofthesemethodsmaintaintheI/OVIatoraboveVCCandpreventadditionalsupplycurrentconsumptionwhentheLEDisoff.
PartMarkingFigure1f20;BACKGROUND-COLOR:#4ae2f7">11f20;BACKGROUND-COLOR:#4ae2f7">1:HighvalueresistorinparallelwiththeLEDFigure1f20;BACKGROUND-COLOR:#4ae2f7">12:DevicesuppliedbyalowervoltagePI4IOE5V9535www.
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pleasecheck:http://www.
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