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SemiconductorComponentsIndustries,LLC,2012March,2012Rev.
71PublicationOrderNumber:NB7L86M/DNB7L86M2.
5V/3.
3V12Gb/sDifferentialClock/DataSmartGatewithCMLOutputandInternalTerminationTheNB7L86MisamultifunctiondifferentialLogicGate,whichcanbeconfiguredasanAND/NAND,OR/NOR,XOR/XNOR,or2:1MUX.
ThisdeviceispartoftheGigaCommfamilyofhighperformanceSiliconGermaniumproducts.
TheNB7L86Misanultralowjittermultilogicgatewithamaximumdatarateof12Gb/sandinputclockfrequencyof8GHzsuitableforDataCommunicationSystems,TelecomSystems,FiberChannel,andGigEapplications.
Differentialinputsincorporateinternal50WterminationresistorsandacceptLVNECL(NegativeECL),LVPECL(PositiveECL),LVCMOS,LVTTL,CML,orLVDS.
Thedifferential16mACMLoutputprovidesmatchinginternal50Wtermination,and400mVoutputswingwhenexternallyterminated50WtoVCC.
Thedeviceishousedinalowprofile3x3mm16pinQFNpackage.
Applicationnotes,models,andsupportdocumentationareavailableonwww.
onsemi.
com.
FeaturesMaximumInputClockFrequencyupto8GHzMaximumInputDataRateupto12Gb/sTypical1500V>50V>500VMoistureSensitivity(Note7)PbPkgPbFreePkgQFN16Level1Level1FlammabilityRatingOxygenIndex:28to34UL94V0@0.
125inTransistorCount400MeetsorexceedsJEDECSpecEIA/JESD78ICLatchupTest7.
ForadditionalMoistureSensitivityinformation,refertoApplicationNoteAND8003/D.
Table7.
MAXIMUMRATINGSSymbolParameterCondition1Condition2RatingUnitsVCCPositivePowerSupplyVEE=0V3.
6VVIInputVoltageVEE=0VVEE≤VI≤VCC3.
6VVINPPDifferentialInputVoltage|DD|VCCVEE≥2.
8VVCCVEE<2.
8V2.
8|VCCVEE|VVIINInputCurrentThroughRT(50WResistor)ContinuousSurge2550mAmAIoutOutputCurrentContinuousSurge2550mAmATAOperatingTemperatureRangeQFN1640to+85°CTstgStorageTemperatureRange65to+150°CqJAThermalResistance(JunctiontoAmbient)(Note8)0lfpm500lfpmQFN16QFN164236°C/W°C/WqJCThermalResistance(JunctiontoCase)2S2P(Note8)QFN163to4°C/WTsolWaveSolderPbPbFree265265°CStressesexceedingMaximumRatingsmaydamagethedevice.
MaximumRatingsarestressratingsonly.
FunctionaloperationabovetheRecommendedOperatingConditionsisnotimplied.
ExtendedexposuretostressesabovetheRecommendedOperatingConditionsmayaffectdevicereliability.
8.
JEDECstandardmultilayerboard2S2P(2signal,2power).
NB7L86Mhttp://onsemi.
com5Table8.
DCCHARACTERISTICS(VCC=2.
375Vto3.
465V,VEE=0V,TA=40°Cto+85°C)SymbolCharacteristicMinTypMaxUnitICCPowerSupplyCurrent(InputsandOutputsOpen)3850mAVOHOutputHIGHVoltage(Notes9and10)VCC60VCC30VCCmVVOLOutputLOWVoltage(Notes9and10)VCC460VCC400VCC310mVDifferentialInputDrivenSingleEnded(seeFigures16&18)VthInputThresholdReferenceVoltageRange(Note11)1125VCC75mVVIHSingleendedInputHIGHVoltage(Note12)Vth+75VCCmVVILSingleendedInputLOWVoltage(Note12)VEEVCC150mVDifferentialInputsDrivenDifferentially(seeFigures17&19)VIHDDifferentialInputHIGHVoltage1200VCCmVVILDDifferentialInputLOWVoltageVEEVCC75mVVCMRInputCommonModeRange(DifferentialConfiguration)1163VCC–38mVVIDDifferentialInputVoltage(VIHDVILD)752500mVIIHInputHIGHCurrentD0/D0/D1/D1SEL/SEL005020150150mAIILInputLOWCurrentD0/D0/D1/D1SEL/SEL50505020100100mARTINInternalInputTerminationResistor455055WRTOUTInternalOutputTerminationResistor455055WRTempCoefInternalI/OTerminationResistorTemperatureCoefficient6.
38mW/°CNOTE:Devicewillmeetthespecificationsafterthermalequilibriumhasbeenestablishedwhenmountedinatestsocketorprintedcircuitboardwithmaintainedairflowgreaterthan500lfpm.
Electricalparametersareguaranteedonlyoverthedeclaredoperatingtemperaturerange.
Functionaloperationofthedeviceexceedingtheseconditionsisnotimplied.
Devicespecificationlimitvaluesareappliedindividuallyundernormaloperatingconditionsandnotvalidsimultaneously.
9.
CMLoutputsrequire50WreceiverterminationresistorstoVCCforproperoperation.
10.
Inputandoutputparametersvary1:1withVCC.
11.
Vthisappliedtothecomplementaryinputwhenoperatinginsingleendedmode.
12.
VCMRminvaries1:1withVEE,VCMRmaxvaries1:1withVCC.
NB7L86Mhttp://onsemi.
com6Table9.
ACCHARACTERISTICS(VCC=2.
375Vto3.
465V,VEE=0V;Note13)SymbolCharacteristic40_C25_C85_CUnitMinTypMaxMinTypMaxMinTypMaxVOUTPPOutputVoltageAmplitude(@VINPPmin)fin≤4GHz(SeeFigure7)fin≤8GHz240125350230240125350230240125350230mVfdataMaximumOperatingDataRate10.
71210.
71210.
712Gb/stPLH,tPHLPropagationDelaytoDx/DxtoQ/QOutputDifferential@1GHzSEL/SELtoQ/Q(SeeFigure7)701109013512018070110901351201807011090135120180pstSKEWDutyCycleSkew(Note14)DevicetoDeviceSkew(Note15)2.
05.
010202.
05.
010202.
05.
01020pstSSetUpTime(DxtoSEL)100100100pstHHoldUpTime(DxtoSEL)151515pstJITTERRMSRandomClockJitter(Note16)fin=4GHzfin=8GHzPeak/PeakDataDependentJitterfdata=5Gb/s(Note17)fdata=10Gb/s0.
20.
22.
04.
00.
50.
58.
0100.
20.
22.
04.
00.
50.
58.
0100.
20.
22.
04.
00.
50.
58.
010psVINPPInputVoltageSwing/Sensitivity(DifferentialConfiguration)(Note18)754002500754002500754002500mVtrtfOutputRise/FallTimes@1GHzQ,Q(20%80%)356035603560psNOTE:Devicewillmeetthespecificationsafterthermalequilibriumhasbeenestablishedwhenmountedinatestsocketorprintedcircuitboardwithmaintainedairflowgreaterthan500lfpm.
Electricalparametersareguaranteedonlyoverthedeclaredoperatingtemperaturerange.
Functionaloperationofthedeviceexceedingtheseconditionsisnotimplied.
Devicespecificationlimitvaluesareappliedindividuallyundernormaloperatingconditionsandnotvalidsimultaneously.
13.
MeasuredbyforcingVINPP(TYP)froma50%dutycycleclocksource.
AllloadingwithanexternalRL=50WtoVCC.
Inputedgerates40ps(20%80%).
14.
DutycycleskewismeasuredbetweendifferentialoutputsusingthedeviationsofthesumofTpwandTpw+@1GHz.
15.
Devicetodeviceskewismeasuredbetweenoutputsunderidenticaltransition@1GHz.
16.
AdditiveRMSjitterwith50%dutycycleclocksignal.
17.
AdditivepeaktopeakdatadependentjitterwithinputNRZdata(PRBS2^231).
18.
VINPP(MAX)cannotexceedVCCVEE.
Inputvoltageswingisasingleendedmeasurementoperatingindifferentialmode.
INPUTFREQUENCY(GHz)Figure7.
OutputVoltageAmplitude(VOUTPP)versusInputClockFrequency(fin)atAmbientTemperature(Typical)OUTPUTVOLTAGEAMPLITUDE(mV)50040030020010001211109876543210VCCVEE=3.
3VVCCVEE=2.
5VNB7L86Mhttp://onsemi.
com7Figure8.
TypicalOutputWaveformat2.
488Gb/swithPRBS2^231(Vinpp=75mV)Figure9.
TypicalOutputWaveformat2.
488Gb/swithPRBS2^231(Vinpp=400mV)Figure10.
TypicalOutputWaveformat10Gb/swithPRBS2^231(Vinpp=75mV)Figure11.
TypicalOutputWaveformat10Gb/swithPRBS2^231(Vinpp=400mV)Figure12.
TypicalOutputWaveformat12Gb/swithPRBS2^231(Vinpp=75mV)Figure13.
TypicalOutputWaveformat12Gb/swithPRBS2^231(Vinpp=400mV)Time(72ps/div)Time(72ps/div)Time(20ps/div)Time(20ps/div)Time(16ps/div)Time(16ps/div)Voltage(45mV/div)Voltage(45mV/div)Voltage(45mV/div)Voltage(45mV/div)Voltage(45mV/div)Voltage(45mV/div)DDJ=1.
2ps*DDJ=1.
2ps*DDJ=2ps**DDJ=2ps**DDJ=4ps***DDJ=4ps****InputsignalDDJ=10ps**InputsignalDDJ=12ps***InputsignalDDJ=14psNB7L86Mhttp://onsemi.
com8Figure14.
ACReferenceMeasurementDDQQtPHLtPLHVINPP=VIH(D)VIL(D)VOUTPP=VOH(Q)VOL(Q)DriverDeviceReceiverDeviceQDFigure15.
TypicalTerminationforOutputDriverandDeviceEvaluation(RefertoApplicationNoteAND8173TerminationandInterfaceofONSemiconductorofECLLogicDeviceswithCMLOutputStructure)QDVCC50W50WZ=50WZ=50WFigure16.
DifferentialInputDrivenSingleEndedFigure17.
DifferentialInputsDrivenDifferentiallyFigure18.
VthDiagramFigure19.
VCMRDiagramDVCCGNDVIHVIHminVIHmaxVthmaxVthVthVthminVCMmaxVCMmaxDVCMRVCCGNDDDVthVthDDVILmaxVILVILminDVILDmaxVIHDmaxVID=VIHDVILDVILDtypVIHDtypVILDminVIHDminNB7L86Mhttp://onsemi.
com9QQVCC16mA50W50WFigure20.
CMLOutputStructureVEETable10.
INTERFACINGOPTIONSINTERFACINGOPTIONSCONNECTIONSCMLConnectVTD0,VTD0,VTD1,VTD1,VTSELtoVCCLVDSConnectVTD0,VTD0togetherforD0input.
ConnectVTD1,VTD1togetherforD0input.
LeaveVTSELopenforSELinput.
ACCOUPLEDBiasVTD0,VTD0,VTSELandVTD1,VTD1Inputswithin(VCMR)CommonModeRangeRSECL,LVPECLStandardECLTerminationTechniques.
SeeAND8020/D.
LVTTL,LVCMOSAnexternalvoltageshouldbeappliedtotheunusedcomplementarydifferentialinput.
Nominalvoltage1.
5VforLVTTLandVCC/2forLVCMOSinputs.
NB7L86Mhttp://onsemi.
com10ApplicationInformationAllinputscanacceptPECL,CML,andLVDSsignallevels.
TheinputvoltagecanrangefromVCCto1.
2V.
Examplesinterfacesareillustratedbelowina50Wenvironment(Z=50W).
50WVCCDD50WNB7L86MVCCVTDVEEVCCQ50W50WNB7L86MVEEFigure21.
CMLtoCMLInterfaceZQZFigure22.
PECLtoCMLReceiverInterface50WZVCCVCCLVDSDriverDD50WNB7L86MVEEVTDVEEFigure23.
LVDStoCMLReceiverInterface50WZZVCCVCCPECLDriverDD50WNB7L86MVEEVBIASVTDVEERTRTVEEVCCRT5.
0V290W3.
3V150W2.
5V80WRecommendedRTValues50W50WVTDVCCVTDVBiasVTDZNB7L86Mhttp://onsemi.
com11ORDERINGINFORMATIONDevicePackageShippingNB7L86MMNGQFN16(PbFree)123Units/RailNB7L86MMNR2GQFN16(PbFree)3000Tape&ReelForinformationontapeandreelspecifications,includingpartorientationandtapesizes,pleaserefertoourTapeandReelPackagingSpecificationsBrochure,BRD8011/D.
NB7L86Mhttp://onsemi.
com12PACKAGEDIMENSIONSQFN163x3,0.
5PCASE485G01ISSUEE16XSEATINGPLANELDE0.
10CAA1eD2E2b148916NOTES:1.
DIMENSIONINGANDTOLERANCINGPERASMEY14.
5M,1994.
2.
CONTROLLINGDIMENSION:MILLIMETERS.
3.
DIMENSIONbAPPLIESTOPLATEDTERMINALANDISMEASUREDBETWEEN0.
25AND0.
30MMFROMTERMINAL.
4.
COPLANARITYAPPLIESTOTHEEXPOSEDPADASWELLASTHETERMINALS.
BA0.
10CTOPVIEWSIDEVIEWBOTTOMVIEWPIN1LOCATION0.
05C0.
05C(A3)CNOTE416X0.
10C0.
05CABNOTE3K16XDIMMINMAXMILLIMETERSA0.
801.
00A10.
000.
05A30.
20REFb0.
180.
30D3.
00BSCD21.
651.
85E3.
00BSCE21.
651.
85e0.
50BSCKL0.
300.
500.
18TYPL1DETAILALALTERNATETERMINALCONSTRUCTIONSA1A3LDETAILBMOLDCMPDEXPOSEDCuALTERNATECONSTRUCTIONSDETAILADETAILBL10.
000.
15*ForadditionalinformationonourPbFreestrategyandsolderingdetails,pleasedownloadtheONSemiconductorSolderingandMountingTechniquesReferenceManual,SOLDERRM/D.
RECOMMENDED2X0.
50PITCH1.
843.
301DIMENSIONS:MILLIMETERS0.
5816X2X0.
3016XOUTLINEPACKAGE2X2X0.
10CABe/2SOLDERINGFOOTPRINT*ONSemiconductorandareregisteredtrademarksofSemiconductorComponentsIndustries,LLC(SCILLC).
SCILLCreservestherighttomakechangeswithoutfurthernoticetoanyproductsherein.
SCILLCmakesnowarranty,representationorguaranteeregardingthesuitabilityofitsproductsforanyparticularpurpose,nordoesSCILLCassumeanyliabilityarisingoutoftheapplicationoruseofanyproductorcircuit,andspecificallydisclaimsanyandallliability,includingwithoutlimitationspecial,consequentialorincidentaldamages.
"Typical"parameterswhichmaybeprovidedinSCILLCdatasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime.
Alloperatingparameters,including"Typicals"mustbevalidatedforeachcustomerapplicationbycustomer'stechnicalexperts.
SCILLCdoesnotconveyanylicenseunderitspatentrightsnortherightsofothers.
SCILLCproductsarenotdesigned,intended,orauthorizedforuseascomponentsinsystemsintendedforsurgicalimplantintothebody,orotherapplicationsintendedtosupportorsustainlife,orforanyotherapplicationinwhichthefailureoftheSCILLCproductcouldcreateasituationwherepersonalinjuryordeathmayoccur.
ShouldBuyerpurchaseoruseSCILLCproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdSCILLCanditsofficers,employees,subsidiaries,affiliates,anddistributorsharmlessagainstallclaims,costs,damages,andexpenses,andreasonableattorneyfeesarisingoutof,directlyorindirectly,anyclaimofpersonalinjuryordeathassociatedwithsuchunintendedorunauthorizeduse,evenifsuchclaimallegesthatSCILLCwasnegligentregardingthedesignormanufactureofthepart.
SCILLCisanEqualOpportunity/AffirmativeActionEmployer.
Thisliteratureissubjecttoallapplicablecopyrightlawsandisnotforresaleinanymanner.
NB7L86M/DPUBLICATIONORDERINGINFORMATIONN.
AmericanTechnicalSupport:8002829855TollFreeUSA/CanadaEurope,MiddleEastandAfricaTechnicalSupport:Phone:421337902910JapanCustomerFocusCenterPhone:81358171050LITERATUREFULFILLMENT:LiteratureDistributionCenterforONSemiconductorP.
O.
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comONSemiconductorWebsite:www.
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com/orderlitForadditionalinformation,pleasecontactyourlocalSalesRepresentative
71PublicationOrderNumber:NB7L86M/DNB7L86M2.
5V/3.
3V12Gb/sDifferentialClock/DataSmartGatewithCMLOutputandInternalTerminationTheNB7L86MisamultifunctiondifferentialLogicGate,whichcanbeconfiguredasanAND/NAND,OR/NOR,XOR/XNOR,or2:1MUX.
ThisdeviceispartoftheGigaCommfamilyofhighperformanceSiliconGermaniumproducts.
TheNB7L86Misanultralowjittermultilogicgatewithamaximumdatarateof12Gb/sandinputclockfrequencyof8GHzsuitableforDataCommunicationSystems,TelecomSystems,FiberChannel,andGigEapplications.
Differentialinputsincorporateinternal50WterminationresistorsandacceptLVNECL(NegativeECL),LVPECL(PositiveECL),LVCMOS,LVTTL,CML,orLVDS.
Thedifferential16mACMLoutputprovidesmatchinginternal50Wtermination,and400mVoutputswingwhenexternallyterminated50WtoVCC.
Thedeviceishousedinalowprofile3x3mm16pinQFNpackage.
Applicationnotes,models,andsupportdocumentationareavailableonwww.
onsemi.
com.
FeaturesMaximumInputClockFrequencyupto8GHzMaximumInputDataRateupto12Gb/sTypical1500V>50V>500VMoistureSensitivity(Note7)PbPkgPbFreePkgQFN16Level1Level1FlammabilityRatingOxygenIndex:28to34UL94V0@0.
125inTransistorCount400MeetsorexceedsJEDECSpecEIA/JESD78ICLatchupTest7.
ForadditionalMoistureSensitivityinformation,refertoApplicationNoteAND8003/D.
Table7.
MAXIMUMRATINGSSymbolParameterCondition1Condition2RatingUnitsVCCPositivePowerSupplyVEE=0V3.
6VVIInputVoltageVEE=0VVEE≤VI≤VCC3.
6VVINPPDifferentialInputVoltage|DD|VCCVEE≥2.
8VVCCVEE<2.
8V2.
8|VCCVEE|VVIINInputCurrentThroughRT(50WResistor)ContinuousSurge2550mAmAIoutOutputCurrentContinuousSurge2550mAmATAOperatingTemperatureRangeQFN1640to+85°CTstgStorageTemperatureRange65to+150°CqJAThermalResistance(JunctiontoAmbient)(Note8)0lfpm500lfpmQFN16QFN164236°C/W°C/WqJCThermalResistance(JunctiontoCase)2S2P(Note8)QFN163to4°C/WTsolWaveSolderPbPbFree265265°CStressesexceedingMaximumRatingsmaydamagethedevice.
MaximumRatingsarestressratingsonly.
FunctionaloperationabovetheRecommendedOperatingConditionsisnotimplied.
ExtendedexposuretostressesabovetheRecommendedOperatingConditionsmayaffectdevicereliability.
8.
JEDECstandardmultilayerboard2S2P(2signal,2power).
NB7L86Mhttp://onsemi.
com5Table8.
DCCHARACTERISTICS(VCC=2.
375Vto3.
465V,VEE=0V,TA=40°Cto+85°C)SymbolCharacteristicMinTypMaxUnitICCPowerSupplyCurrent(InputsandOutputsOpen)3850mAVOHOutputHIGHVoltage(Notes9and10)VCC60VCC30VCCmVVOLOutputLOWVoltage(Notes9and10)VCC460VCC400VCC310mVDifferentialInputDrivenSingleEnded(seeFigures16&18)VthInputThresholdReferenceVoltageRange(Note11)1125VCC75mVVIHSingleendedInputHIGHVoltage(Note12)Vth+75VCCmVVILSingleendedInputLOWVoltage(Note12)VEEVCC150mVDifferentialInputsDrivenDifferentially(seeFigures17&19)VIHDDifferentialInputHIGHVoltage1200VCCmVVILDDifferentialInputLOWVoltageVEEVCC75mVVCMRInputCommonModeRange(DifferentialConfiguration)1163VCC–38mVVIDDifferentialInputVoltage(VIHDVILD)752500mVIIHInputHIGHCurrentD0/D0/D1/D1SEL/SEL005020150150mAIILInputLOWCurrentD0/D0/D1/D1SEL/SEL50505020100100mARTINInternalInputTerminationResistor455055WRTOUTInternalOutputTerminationResistor455055WRTempCoefInternalI/OTerminationResistorTemperatureCoefficient6.
38mW/°CNOTE:Devicewillmeetthespecificationsafterthermalequilibriumhasbeenestablishedwhenmountedinatestsocketorprintedcircuitboardwithmaintainedairflowgreaterthan500lfpm.
Electricalparametersareguaranteedonlyoverthedeclaredoperatingtemperaturerange.
Functionaloperationofthedeviceexceedingtheseconditionsisnotimplied.
Devicespecificationlimitvaluesareappliedindividuallyundernormaloperatingconditionsandnotvalidsimultaneously.
9.
CMLoutputsrequire50WreceiverterminationresistorstoVCCforproperoperation.
10.
Inputandoutputparametersvary1:1withVCC.
11.
Vthisappliedtothecomplementaryinputwhenoperatinginsingleendedmode.
12.
VCMRminvaries1:1withVEE,VCMRmaxvaries1:1withVCC.
NB7L86Mhttp://onsemi.
com6Table9.
ACCHARACTERISTICS(VCC=2.
375Vto3.
465V,VEE=0V;Note13)SymbolCharacteristic40_C25_C85_CUnitMinTypMaxMinTypMaxMinTypMaxVOUTPPOutputVoltageAmplitude(@VINPPmin)fin≤4GHz(SeeFigure7)fin≤8GHz240125350230240125350230240125350230mVfdataMaximumOperatingDataRate10.
71210.
71210.
712Gb/stPLH,tPHLPropagationDelaytoDx/DxtoQ/QOutputDifferential@1GHzSEL/SELtoQ/Q(SeeFigure7)701109013512018070110901351201807011090135120180pstSKEWDutyCycleSkew(Note14)DevicetoDeviceSkew(Note15)2.
05.
010202.
05.
010202.
05.
01020pstSSetUpTime(DxtoSEL)100100100pstHHoldUpTime(DxtoSEL)151515pstJITTERRMSRandomClockJitter(Note16)fin=4GHzfin=8GHzPeak/PeakDataDependentJitterfdata=5Gb/s(Note17)fdata=10Gb/s0.
20.
22.
04.
00.
50.
58.
0100.
20.
22.
04.
00.
50.
58.
0100.
20.
22.
04.
00.
50.
58.
010psVINPPInputVoltageSwing/Sensitivity(DifferentialConfiguration)(Note18)754002500754002500754002500mVtrtfOutputRise/FallTimes@1GHzQ,Q(20%80%)356035603560psNOTE:Devicewillmeetthespecificationsafterthermalequilibriumhasbeenestablishedwhenmountedinatestsocketorprintedcircuitboardwithmaintainedairflowgreaterthan500lfpm.
Electricalparametersareguaranteedonlyoverthedeclaredoperatingtemperaturerange.
Functionaloperationofthedeviceexceedingtheseconditionsisnotimplied.
Devicespecificationlimitvaluesareappliedindividuallyundernormaloperatingconditionsandnotvalidsimultaneously.
13.
MeasuredbyforcingVINPP(TYP)froma50%dutycycleclocksource.
AllloadingwithanexternalRL=50WtoVCC.
Inputedgerates40ps(20%80%).
14.
DutycycleskewismeasuredbetweendifferentialoutputsusingthedeviationsofthesumofTpwandTpw+@1GHz.
15.
Devicetodeviceskewismeasuredbetweenoutputsunderidenticaltransition@1GHz.
16.
AdditiveRMSjitterwith50%dutycycleclocksignal.
17.
AdditivepeaktopeakdatadependentjitterwithinputNRZdata(PRBS2^231).
18.
VINPP(MAX)cannotexceedVCCVEE.
Inputvoltageswingisasingleendedmeasurementoperatingindifferentialmode.
INPUTFREQUENCY(GHz)Figure7.
OutputVoltageAmplitude(VOUTPP)versusInputClockFrequency(fin)atAmbientTemperature(Typical)OUTPUTVOLTAGEAMPLITUDE(mV)50040030020010001211109876543210VCCVEE=3.
3VVCCVEE=2.
5VNB7L86Mhttp://onsemi.
com7Figure8.
TypicalOutputWaveformat2.
488Gb/swithPRBS2^231(Vinpp=75mV)Figure9.
TypicalOutputWaveformat2.
488Gb/swithPRBS2^231(Vinpp=400mV)Figure10.
TypicalOutputWaveformat10Gb/swithPRBS2^231(Vinpp=75mV)Figure11.
TypicalOutputWaveformat10Gb/swithPRBS2^231(Vinpp=400mV)Figure12.
TypicalOutputWaveformat12Gb/swithPRBS2^231(Vinpp=75mV)Figure13.
TypicalOutputWaveformat12Gb/swithPRBS2^231(Vinpp=400mV)Time(72ps/div)Time(72ps/div)Time(20ps/div)Time(20ps/div)Time(16ps/div)Time(16ps/div)Voltage(45mV/div)Voltage(45mV/div)Voltage(45mV/div)Voltage(45mV/div)Voltage(45mV/div)Voltage(45mV/div)DDJ=1.
2ps*DDJ=1.
2ps*DDJ=2ps**DDJ=2ps**DDJ=4ps***DDJ=4ps****InputsignalDDJ=10ps**InputsignalDDJ=12ps***InputsignalDDJ=14psNB7L86Mhttp://onsemi.
com8Figure14.
ACReferenceMeasurementDDQQtPHLtPLHVINPP=VIH(D)VIL(D)VOUTPP=VOH(Q)VOL(Q)DriverDeviceReceiverDeviceQDFigure15.
TypicalTerminationforOutputDriverandDeviceEvaluation(RefertoApplicationNoteAND8173TerminationandInterfaceofONSemiconductorofECLLogicDeviceswithCMLOutputStructure)QDVCC50W50WZ=50WZ=50WFigure16.
DifferentialInputDrivenSingleEndedFigure17.
DifferentialInputsDrivenDifferentiallyFigure18.
VthDiagramFigure19.
VCMRDiagramDVCCGNDVIHVIHminVIHmaxVthmaxVthVthVthminVCMmaxVCMmaxDVCMRVCCGNDDDVthVthDDVILmaxVILVILminDVILDmaxVIHDmaxVID=VIHDVILDVILDtypVIHDtypVILDminVIHDminNB7L86Mhttp://onsemi.
com9QQVCC16mA50W50WFigure20.
CMLOutputStructureVEETable10.
INTERFACINGOPTIONSINTERFACINGOPTIONSCONNECTIONSCMLConnectVTD0,VTD0,VTD1,VTD1,VTSELtoVCCLVDSConnectVTD0,VTD0togetherforD0input.
ConnectVTD1,VTD1togetherforD0input.
LeaveVTSELopenforSELinput.
ACCOUPLEDBiasVTD0,VTD0,VTSELandVTD1,VTD1Inputswithin(VCMR)CommonModeRangeRSECL,LVPECLStandardECLTerminationTechniques.
SeeAND8020/D.
LVTTL,LVCMOSAnexternalvoltageshouldbeappliedtotheunusedcomplementarydifferentialinput.
Nominalvoltage1.
5VforLVTTLandVCC/2forLVCMOSinputs.
NB7L86Mhttp://onsemi.
com10ApplicationInformationAllinputscanacceptPECL,CML,andLVDSsignallevels.
TheinputvoltagecanrangefromVCCto1.
2V.
Examplesinterfacesareillustratedbelowina50Wenvironment(Z=50W).
50WVCCDD50WNB7L86MVCCVTDVEEVCCQ50W50WNB7L86MVEEFigure21.
CMLtoCMLInterfaceZQZFigure22.
PECLtoCMLReceiverInterface50WZVCCVCCLVDSDriverDD50WNB7L86MVEEVTDVEEFigure23.
LVDStoCMLReceiverInterface50WZZVCCVCCPECLDriverDD50WNB7L86MVEEVBIASVTDVEERTRTVEEVCCRT5.
0V290W3.
3V150W2.
5V80WRecommendedRTValues50W50WVTDVCCVTDVBiasVTDZNB7L86Mhttp://onsemi.
com11ORDERINGINFORMATIONDevicePackageShippingNB7L86MMNGQFN16(PbFree)123Units/RailNB7L86MMNR2GQFN16(PbFree)3000Tape&ReelForinformationontapeandreelspecifications,includingpartorientationandtapesizes,pleaserefertoourTapeandReelPackagingSpecificationsBrochure,BRD8011/D.
NB7L86Mhttp://onsemi.
com12PACKAGEDIMENSIONSQFN163x3,0.
5PCASE485G01ISSUEE16XSEATINGPLANELDE0.
10CAA1eD2E2b148916NOTES:1.
DIMENSIONINGANDTOLERANCINGPERASMEY14.
5M,1994.
2.
CONTROLLINGDIMENSION:MILLIMETERS.
3.
DIMENSIONbAPPLIESTOPLATEDTERMINALANDISMEASUREDBETWEEN0.
25AND0.
30MMFROMTERMINAL.
4.
COPLANARITYAPPLIESTOTHEEXPOSEDPADASWELLASTHETERMINALS.
BA0.
10CTOPVIEWSIDEVIEWBOTTOMVIEWPIN1LOCATION0.
05C0.
05C(A3)CNOTE416X0.
10C0.
05CABNOTE3K16XDIMMINMAXMILLIMETERSA0.
801.
00A10.
000.
05A30.
20REFb0.
180.
30D3.
00BSCD21.
651.
85E3.
00BSCE21.
651.
85e0.
50BSCKL0.
300.
500.
18TYPL1DETAILALALTERNATETERMINALCONSTRUCTIONSA1A3LDETAILBMOLDCMPDEXPOSEDCuALTERNATECONSTRUCTIONSDETAILADETAILBL10.
000.
15*ForadditionalinformationonourPbFreestrategyandsolderingdetails,pleasedownloadtheONSemiconductorSolderingandMountingTechniquesReferenceManual,SOLDERRM/D.
RECOMMENDED2X0.
50PITCH1.
843.
301DIMENSIONS:MILLIMETERS0.
5816X2X0.
3016XOUTLINEPACKAGE2X2X0.
10CABe/2SOLDERINGFOOTPRINT*ONSemiconductorandareregisteredtrademarksofSemiconductorComponentsIndustries,LLC(SCILLC).
SCILLCreservestherighttomakechangeswithoutfurthernoticetoanyproductsherein.
SCILLCmakesnowarranty,representationorguaranteeregardingthesuitabilityofitsproductsforanyparticularpurpose,nordoesSCILLCassumeanyliabilityarisingoutoftheapplicationoruseofanyproductorcircuit,andspecificallydisclaimsanyandallliability,includingwithoutlimitationspecial,consequentialorincidentaldamages.
"Typical"parameterswhichmaybeprovidedinSCILLCdatasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime.
Alloperatingparameters,including"Typicals"mustbevalidatedforeachcustomerapplicationbycustomer'stechnicalexperts.
SCILLCdoesnotconveyanylicenseunderitspatentrightsnortherightsofothers.
SCILLCproductsarenotdesigned,intended,orauthorizedforuseascomponentsinsystemsintendedforsurgicalimplantintothebody,orotherapplicationsintendedtosupportorsustainlife,orforanyotherapplicationinwhichthefailureoftheSCILLCproductcouldcreateasituationwherepersonalinjuryordeathmayoccur.
ShouldBuyerpurchaseoruseSCILLCproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdSCILLCanditsofficers,employees,subsidiaries,affiliates,anddistributorsharmlessagainstallclaims,costs,damages,andexpenses,andreasonableattorneyfeesarisingoutof,directlyorindirectly,anyclaimofpersonalinjuryordeathassociatedwithsuchunintendedorunauthorizeduse,evenifsuchclaimallegesthatSCILLCwasnegligentregardingthedesignormanufactureofthepart.
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