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TPS62650-Q1www.
ti.
comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013800-mA,6-MHzHigh-EfficiencyStep-DownConverterWithI2CCompatibleInterfaceinChip-ScalePackagingCheckforSamples:TPS62650-Q11FEATURESSolutionTotalSolutionSize<13mm223QualifiedforAutomotiveApplicationsAvailableina9-PinNanoFree(CSP)PackageAEC-Q100QualifiedWiththeFollowingResults:APPLICATIONS–DeviceTemperatureGrade2:–40°Cto+105°CAmbientOperatingTemperatureSmartReflexCompliantPowerSupplyRangeOMAPApplicationProcessorCoreSupply–DeviceHBMESDClassificationLevelH2CellPhones,Smart-Phones–DeviceCDMESDClassificationLevelC3BMicroDC-DCConverterModules86%Efficiencyat6-MHzOperationDESCRIPTIONTheTPS62650-Q1deviceisahigh-frequency38-μAQuiescentCurrentsynchronousstep-downdc-dcconverteroptimizedforWideVINRangeFrom2.
3Vto5.
5Vbattery-poweredportableapplications.
Intendedfor6-MHzRegulatedFrequencyOperationlow-powerapplications,theTPS62650-Q1supportsupto800-mAloadcurrentandallowstheuseofBest-in-ClassLoadandLineTransientsmall,low-costinductorsandcapacitors.
±2%PWMDCVoltageAccuracyThedeviceisidealformobilephonesandsimilarAutomaticPFM/PWMModeSwitchingportableapplicationspoweredbyasingle-cellLi-IonLow-RippleLight-LoadPFMbattery.
WithanoutputvoltagerangeadjustableviaI2CCompatibleInterfaceupto3.
4MbpsanI2Cinterfacedownto0.
75V,thedevicesupportslow-voltagecorepowersuppliesforDSPsandPin-SelectableOutputVoltage(VSEL)processorsinsmart-phonesandhandheldInternalSoft-Start,<150-μsStart-UpTimecomputers.
CurrentOverloadandThermalShutdownTheTPS62650-Q1operatesataregulated6-MHzProtectionswitchingfrequencyandenterstheefficiency-ThreeSurface-MountExternalComponentsoptimizedpower-savemodeoperationatlightloadRequired(OneMLCCInductor,TwoCeramiccurrentstomaintainhighefficiencyovertheentireCapacitors)loadcurrentrange.
Intheshutdownmode,theCompleteSub1-mmComponentProfilecurrentconsumptionisreducedtolessthan3.
5μA.
Figure1.
TypicalApplicationFigure2.
EfficiencyvsLoadControl1Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
2NanoFree,SmartReflex,OMAParetrademarksofTexasInstruments.
3I2CisatrademarkofPhilipsSemiconductors.
PRODUCTIONDATAinformationiscurrentasofpublicationdate.
Copyright2012–2013,TexasInstrumentsIncorporatedProductsconformtospecificationsperthetermsoftheTexasInstrumentsstandardwarranty.
Productionprocessingdoesnotnecessarilyincludetestingofallparameters.
TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
ti.
comTheserialinterfaceiscompatiblewithStandard,Fast/FastPlusandHigh-SpeedmodeI2Cspecificationallowingtransfersatupto3.
4Mbps.
Thiscommunicationinterfaceisusedfordynamicvoltagescalingwithvoltagestepsdownto12.
5mVforsettingtheoutputvoltageorreprogrammingthemodeofoperation(PFM/PWMorForcedPWM),forinstance.
Thesedeviceshavelimitedbuilt-inESDprotection.
TheleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoamduringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates.
spacerORDERINGINFORMATIONDEFAULTPACKAGEI2CADDRESSBITSPARTOUTPUTVOLTAGEOUTPUTVOLTAGEPACKAGEORDERINGMARKINGNUMBERRANGE(CC)VSEL0VSEL1A2A1TPS62650-0.
75Vto1.
4375V1.
05V1.
2V01YFF-9TPS62650TYFFRQ1Q1Q1(1)(1)ThefollowingregistersbitsaresetbyinternalhardwarelogicandnotuserprogrammablethroughI2C:(a)VSEL0[7]=1(b)VSEL1[7]=1(c)CONTROL1[3:2]=00ABSOLUTEMAXIMUMRATINGSoveroperatingfree-airtemperaturerange(unlessotherwisenoted)(1)VALUEUNITMINMAXatVIN,SW(2)–0.
37VInputVoltageatFB(2)–0.
33.
6VatEN,VSEL,SCL,SDA(2)–0.
3VI+0.
3VPowerdissipationInternallylimitedOperatingambienttemperature,TA(3)–40105°CMaximumoperatingjunctionTemperature,TJ150°CStoragetemperaturerange,Tstg–65150°CHuman-bodymodel(HBM)AEC-Q100ClassificationLevelH22kVESDrating(4)Charged-devicemodel(CDM)AEC-Q100ClassificationLevel750VC3B(1)Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.
Thesearestressratingsonlyandfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperatingconditionsisnotimplied.
Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
(2)Allvoltagevaluesarewithrespecttonetworkgroundterminal.
(3)Inapplicationswherehighpowerdissipationand/orpoorpackagethermalresistanceispresent,themaximumambienttemperaturemayhavetobederated.
Maximumambienttemperature(TA(max))isdependentonthemaximumoperatingjunctiontemperature(TJ(max)),themaximumpowerdissipationofthedeviceintheapplication(PD(max)),andthejunction-to-ambientthermalresistanceofthepart/packageintheapplication(θJA),asgivenbythefollowingequation:TA(max)=TJ(max)–(θJAXPD(max)).
Toachieveoptimumperformance,itisrecommendedtooperatethedevicewithamaximumjunctiontemperatureof105°C.
(4)Thehumanbodymodelisa100-pFcapacitordischargedthrougha1.
5-kresistorintoeachpin.
2SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013THERMALINFORMATIONTPS62650-Q1THERMALMETRIC(1)YFFUNITS9PINSθJAJunction-to-ambientthermalresistance107.
0θJCtopJunction-to-case(top)thermalresistance0.
9θJBJunction-to-boardthermalresistance18.
1°C/WψJTJunction-to-topcharacterizationparameter4.
0ψJBJunction-to-boardcharacterizationparameter18.
0θJCbotJunction-to-case(bottom)thermalresistancen/aspacer(1)Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953.
ELECTRICALCHARACTERISTICSMinimumandmaximumvaluesareatVI=2.
3Vto5.
5V,VO=1.
2V,EN=1.
8V,EN_DCDCbit=1,AUTOmodeandTA=-40°Cto105°C;CircuitofParameterMeasurementInformationsection(unlessotherwisenoted).
TypicalvaluesareatVI=3.
6V,VO=1.
2V,EN=1.
8V,EN_DCDCbit=1,AUTOmodeandTA=25°C(unlessotherwisenoted).
PARAMETERTESTCONDITIONSMINTYPMAXUNITSUPPLYCURRENTVIInputvoltagerange2.
35.
5VVI=3.
6V,IO=0mA,-40°C≤TA≤105°C.
Devicenotswitching3880μAIQOperatingquiescentcurrentVI=3.
6V,IO=0mA.
PWMmode5.
35mAVI=3.
6V,EN=GND,EN_DCDCbit=X,-40°C≤TA≤105°C0.
510μAI(SD)ShutdowncurrentVI=3.
6V,EN=VI,EN_DCDCbit=0,-40°C≤TA≤105°C0.
510μAUVLOUndervoltagelockoutthresholdFalling2.
052.
15VENABLE,VSEL,SDA,SCLVIHHigh-levelinputvoltage0.
9VVILLow-levelinputvoltage0.
4VIlkgInputleakagecurrentInputtiedtoGNDorVI,-40°C≤TA≤105°C0.
010.
7μAPOWERSWITCHVI=V(GS)=3.
6V255rDS(on)P-channelMOSFETonresistancemVI=V(GS)=2.
5V335IlkgP-channelleakagecurrent,PMOSV(DS)=5.
5V,-40°C≤TA≤105°C1μAVI=V(GS)=3.
6V140rDS(on)N-channelMOSFETonresistancemVI=V(GS)=2.
5V200IlkgN-channelleakagecurrent,NMOSV(DS)=5.
5V,-40°C≤TA≤105°C1μADischargeresistorforpower-downrDIS1550sequenceP-MOScurrentlimit2.
3V≤VI≤4.
8V.
Openloop120015001850mAInputcurrentlimitundershort-circuitVO=0V11mAconditionsThermalshutdown140°CThermalshutdownhysteresis15°COSCILLATORIO=0mA.
PWMmode,TA=25°C5.
466.
6fSWOscillatorfrequencyMHzIO=0mA.
PWMmode,-40°C≤TA≤105°C5.
266.
8Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback3ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comELECTRICALCHARACTERISTICS(continued)MinimumandmaximumvaluesareatVI=2.
3Vto5.
5V,VO=1.
2V,EN=1.
8V,EN_DCDCbit=1,AUTOmodeandTA=-40°Cto105°C;CircuitofParameterMeasurementInformationsection(unlessotherwisenoted).
TypicalvaluesareatVI=3.
6V,VO=1.
2V,EN=1.
8V,EN_DCDCbit=1,AUTOmodeandTA=25°C(unlessotherwisenoted).
PARAMETERTESTCONDITIONSMINTYPMAXUNITOUTPUT2.
3V≤VI≤5.
5V,0mA≤IO(DC)≤800mAVO=0.
75V,1.
05V,1.
20V,1.
4375V(TPS62650-Q1)–4%4%PWMoperationTA=85°CRegulatedDCoutput2.
3V≤VI≤5.
5V,0mA≤IO(DC)≤800mA–2%2%voltageaccuracyVO=0.
75V,1.
05V,1.
20V,1.
4375V(TPS62650-Q1)PWMoperationTPS62650-VO2.
3V≤VI≤5.
5V,0mA≤IO(DC)≤800mAQ1/1VO=0.
75V,1.
05V,1.
20V,1.
4375V(TPS62650-Q1)–4%4%PFM/PWMOperationRegulatedDCoutputVI=3.
6V,VO=1.
20V,IO(DC)=50mA-0.
5%+0.
5%voltagetemperaturedrift-40°C≤TA≤105°C.
PWMoperationLineregulationVI=VO+0.
5V(min2.
3V)to5.
5V,IO(DC)=200mA0.
13%/VLoadregulationIO(DC)=0mAto800mA–0.
00046%/mAFeedbackinputresistance480kVO=1.
05V,VSEL=GND,IO(DC)=1mA16mVPPPFMoperationΔVOPower-savemoderipplevoltageVO=1.
20V,VSEL=VI,IO(DC)=1mA16mVPPPFMoperationDACTPS62650-Resolution6BitsQ1DifferentialnonlinearitySpecifiedmonotonicbydesign±0.
4LSBTIMINGSetupTimeBetweenTPS62650-RisingENandStartof50μsQ1/1I2CStreamOutputvoltagesettlingTPS62650-Frommintomaxoutputvoltage,VO12μstimeQ1/1IO(DC)=500mA,VSEL=VI,PWMoperationTimefromactiveENtoVO125VO=1.
2V,IO=0mA,PWMoperationTPS62650-Start-uptimeμsQ1/1TimefromactiveENtoVO120VO=1.
05V,IO=0mA,PFMoperationI2CINTERFACETIMINGCHARACTERISTICS(1)PARAMETERTESTCONDITIONSMINMAXUNITStandardmode100kHzFastmode400kHzFastmodeplus1MHzf(SCL)SCLClockFrequencyHigh-speedmode(writeoperation),CB–100pFmax3.
4MHzHigh-speedmode(readoperation),CB–100pFmax3.
4MHzHigh-speedmode(writeoperation),CB–400pFmax1.
7MHzHigh-speedmode(readoperation),CB–400pFmax1.
7MHzStandardmode4.
7μsBusFreeTimeBetweenaSTOPandtBUFFastmode1.
3μsSTARTConditionFastmodeplus0.
5μsStandardmode4μsFastmode600nsHoldTime(Repeated)STARTtHD,tSTAConditionFastmodeplus260nsHigh-speedmode160ns(1)Specifiedbydesign.
Nottestedinproduction.
4SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013I2CINTERFACETIMINGCHARACTERISTICS(continued)PARAMETERTESTCONDITIONSMINMAXUNITStandardmode4.
7μsFastmode1.
3μstLOWLOWPeriodoftheSCLClockFastmodeplus0.
5μsHigh-speedmode,CB–100pFmax160nsHigh-speedmode,CB–400pFmax320nsStandardmode4μsFastmode600nstHIGHHIGHPeriodoftheSCLClockFastmodeplus260nsHigh-speedmode,CB–100pFmax60nsHigh-speedmode,CB–400pFmax120nsStandardmode4.
7μsFastmode600nsSetupTimeforaRepeatedSTARTtSU,tSTAConditionFastmodeplus260nsHigh-speedmode160nsStandardmode250nsFastmode100nstSU,tDATDataSetupTimeFastmodeplus50nsHigh-speedmode10nsStandardmode03.
45μsFastmode00.
9μstHD,tDATDataHoldTimeFastmodeplus0μsHigh-speedmode,CB–100pFmax070nsHigh-speedmode,CB–400pFmax0150nsStandardmode20+0.
1CB1000nsFastmode20+0.
1CB300nstRCLRiseTimeofSCLSignalFastmodeplus120nsHigh-speedmode,CB–100pFmax1040nsHigh-speedmode,CB–400pFmax2080nsStandardmode20+0.
1CB1000nsFastmode20+0.
1CB300nsRiseTimeofSCLSignalAfteratRCL1RepeatedSTARTConditionandAfterFastmodeplus120nsanAcknowledgeBITHigh-speedmode,CB–100pFmax1080nsHigh-speedmode,CB–400pFmax20160nsStandardmode20+0.
1CB300nsFastmode20+0.
1CB300nstFCLFallTimeofSCLSignalFastmodeplus120nsHigh-speedmode,CB–100pFmax1040nsHigh-speedmode,CB–400pFmax2080nsStandardmode20+0.
1CB1000nsFastmode20+0.
1CB300nstRDARiseTimeofSDASignalFastmodeplus120nsHigh-speedmode,CB–100pFmax1080nsHigh-speedmode,CB–400pFmax20160nsCopyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback5ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comI2CINTERFACETIMINGCHARACTERISTICS(continued)PARAMETERTESTCONDITIONSMINMAXUNITStandardmode20+0.
1CB300nsFastmode20+0.
1CB300nstFDAFallTimeofSDASignalFastmodeplus120nsHigh-speedmode,CB–100pFmax1080nsHigh-speedmode,CB–400pFmax20160nsStandardmode4μsFastmode600nstSU,tSTOSetupTimeofSTOPConditionFastmodeplus260nsHigh-Speedmode160nsStandardmode400pFFastmode400pFCBCapacitiveLoadforSDAandSCLFastmodeplus550pFHigh-Speedmode400pF6SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013I2CTIMINGDIAGRAMSFigure3.
SerialInterfaceTimingDiagramforStandard-,Fast-,Fast-ModePlusFigure4.
SerialInterfaceTimingDiagramforHS-ModeCopyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback7ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comPINASSIGNMENTSTERMINALFUNCTIONSTERMINALI/ODESCRIPTIONNAMENO.
VINA2IThisistheinputvoltagepinofthedevice.
Connectdirectlytotheinputbypasscapacitor.
Thisistheenablepinofthedevice.
Connectthispintogroundforcesthedeviceintoshutdownmode.
PullingthispintoVIenablesthedevice.
OntherisingedgeoftheenableENB3Ipin,alltheregistersareresetwiththeirdefaultvalues.
Thispinmustnotbeleftfloatingandmustbeterminated.
VSELsignalisprimarilyusedtoscaletheoutputvoltageandtosettheTPS62650-Q1operationbetweenactivemode(VSEL=HIGH)andsleepmode(VSEL=LOW).
ThemodeofVSELA1IoperationcanalsobeadaptedbyI2Csettings.
Thispinmustnotbeleftfloatingandmustbeterminated.
SDAA3I/OSerialinterfaceaddress/dataline.
SCLB2ISerialinterfaceclockline.
FBC1IOutputfeedbacksenseinput.
ConnectFBtotheconverteroutput.
GNDC2,C3Ground.
ThisistheswitchpinoftheconverterandconnectedtothedrainoftheinternalpowerSWB1I/OMOSFETs.
FUNCTIONALBLOCKDIAGRAM8SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013PARAMETERMEASUREMENTINFORMATIONTYPICALCHARACTERISTICSTableofGraphsFIGUREvsOutputcurrent5,6,7,8ηEfficiencyvsInputvoltage9Peak-to-peakoutputripplevoltagevsOutputCurrent10,11,12,13vsOutputcurrent14,15,16,17VODCoutputvoltagevsAmbienttemperature18,19MeasuredoutputvoltagevsDACtargetoutputvoltage20PFM/PWMBoundaries21IQQuiescentcurrentvsInputvoltage22ISDShutdowncurrentvsInputvoltage23fSSwitchingfrequencyvsInputvoltage24P-channelMOSFETrDS(on)vsInputvoltage25rDS(on)N-channelMOSFETrDS(on)vsInputvoltage26Loadtransientresponse27-38LinetransientPWMoperation39Combinedlineandloadtransient40responsePWMoperation41Power-savemodeoperation42Dynamicvoltagemanagement43,44Outputvoltagerampcontrol45Start-up46,47Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback9ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comTYPICALCHARACTERISTICS(continued)EFFICIENCYEFFICIENCYvsvsOUTPUTCURRENTOUTPUTCURRENTFigure5.
Figure6.
EFFICIENCYEFFICIENCYvsvsOUTPUTCURRENTOUTPUTCURRENTFigure7.
Figure8.
10SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013TYPICALCHARACTERISTICS(continued)EFFICIENCYPEAK-TO-PEAKOUTPUTRIPPLEVOLTAGEvsvsINPUTVOLTAGEOUTPUTCURRENTFigure9.
Figure10.
PEAK-TO-PEAKOUTPUTRIPPLEVOLTAGEPEAK-TO-PEAKOUTPUTRIPPLEVOLTAGEvsvsOUTPUTCURRENTOUTPUTCURRENTFigure11.
Figure12.
Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback11ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comTYPICALCHARACTERISTICS(continued)PEAK-TO-PEAKOUTPUTRIPPLEVOLTAGEDCOUTPUTVOLTAGEvsvsOUTPUTCURRENTOUTPUTCURRENTFigure13.
Figure14.
DCOUTPUTVOLTAGEDCOUTPUTVOLTAGEvsvsOUTPUTCURRENTOUTPUTCURRENTFigure15.
Figure16.
12SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013TYPICALCHARACTERISTICS(continued)DCOUTPUTVOLTAGEDCOUTPUTVOLTAGEvsvsOUTPUTCURRENTAMBIENTTEMPERATUREFigure17.
Figure18.
DCOUTPUTVOLTAGEMEASUREDOUTPUTVOLTAGEvsvsAMBIENTTEMPERATUREDACTARGETOUTPUTVOLTAGEFigure19.
Figure20.
Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback13ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comTYPICALCHARACTERISTICS(continued)QUIESCENTCURRENTvsPFM/PWMBOUNDARIESINPUTVOLTAGEFigure21.
Figure22.
SHUTDOWNCURRENTSWITCHINGFREQUENCYvsvsINPUTVOLTAGEINPUTVOLTAGEFigure23.
Figure24.
14SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013TYPICALCHARACTERISTICS(continued)rDS(on)P-MOSFETrDS(on)N-MOSFETvsvsINPUTVOLTAGEINPUTVOLTAGEFigure25.
Figure26.
LOADTRANSIENT:50mA/400mA/50mALOADTRANSIENT:50mA/400mAPWMOPERATIONPWMOPERATIONFigure27.
Figure28.
Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback15ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comTYPICALCHARACTERISTICS(continued)LOADTRANSIENT:400mA/50mALOADTRANSIENT:50mA/400mA/50mAPWMOPERATIONPFM/PWMOPERATIONFigure29.
Figure30.
LOADTRANSIENT:50mA/400mALOADTRANSIENT:400mA/50mAPFM/PWMOPERATIONPFM/PWMOPERATIONFigure31.
Figure32.
16SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013TYPICALCHARACTERISTICS(continued)LOADTRANSIENT:400mA/750mA/400mALOADTRANSIENT:400mA/750mAPWMOPERATIONPWMOPERATIONFigure33.
Figure34.
LOADTRANSIENT:750mA/400mALOADTRANSIENT:5mA/100mA/5mAPWMOPERATIONPFM/PWMOPERATIONFigure35.
Figure36.
Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback17ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comTYPICALCHARACTERISTICS(continued)LOADTRANSIENT:5mA/100mALOADTRANSIENT:100mA/5mAPFM/PWMOPERATIONPFM/PWMOPERATIONFigure37.
Figure38.
COMBINEDLINE/LOADTRANSIENTLINETRANSIENT(3.
3VTO3.
9V,400mATO800mA)PWMOPERATIONPWMOPERATIONFigure39.
Figure40.
18SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013TYPICALCHARACTERISTICS(continued)PWMOPERATIONPOWERSAVEMODEOPERATIONFigure41.
Figure42.
DYNAMICVOLTAGEMANAGEMENTDYNAMICVOLTAGEMANAGEMENTFigure43.
Figure44.
Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback19ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comTYPICALCHARACTERISTICS(continued)OUTPUTVOLTAGERAMPCONTROLSTARTUPFigure45.
Figure46.
STARTUPFigure47.
20SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013DETAILEDDESCRIPTIONOperationTheTPS62650-Q1isasynchronousstep-downconvertertypicallyoperatesataregulated6-MHzfrequencypulsewidthmodulation(PWM)atmoderatetoheavyloadcurrents.
Atlightloadcurrents,theTPS62650-Q1converteroperatesinpower-savemodewithpulsefrequencymodulation(PFM)andautomatictransitionintoPWMoperationwhentheloadcurrentincreases.
TheTPS62650-Q1integratesanI2Ccompatibleinterfaceallowingtransfersupto3.
4Mbps.
Thiscommunicationinterfacecanbeusedfordynamicvoltagescalingwithvoltagestepsdownto12.
5mV,forreprogrammingthemodeofoperation(PFMorforcedPWM)ordisable/enablingtheoutputvoltageforinstance.
Formoredetails,seetheI2Cinterfaceandregisterdescriptionsection.
Theconverterusesauniquefrequencylockedringoscillatingmodulatortoachievebest-in-classloadandlineresponseandallowstheuseoftinyinductorsandsmallceramicinputandoutputcapacitors.
Atthebeginningofeachswitchingcycle,theP-channelMOSFETswitchisturnedonandtheinductorcurrentrampsuprisingtheoutputvoltageuntilthemaincomparatortrips,thenthecontrollogicturnsofftheswitch.
Onekeyadvantageofthenon-lineararchitectureisthatthereisnotraditionalfeed-backloop.
TheloopresponsetochangeinVOisessentiallyinstantaneous,whichexplainsitsextraordinarytransientresponse.
Theabsenceofatraditional,high-gaincompensatedlinearloopmeansthattheTPS62650-Q1isinherentlystableoverarangeofsmallLandCO.
Althoughthistypeofoperationnormallyresultsinaswitchingfrequencythatvarieswithinputvoltageandloadcurrent,aninternalfrequencylockloop(FLL)holdstheswitchingfrequencyconstantoveralargerangeofoperatingconditions.
Combinedwithbestinclassloadandlinetransientresponsecharacteristics,thelowquiescentcurrentofthedevice(ca.
38μA)allowstomaintainhighefficiencyatlightload,whilepreservingfasttransientresponseforapplicationsrequiringtightoutputregulation.
SWITCHINGFREQUENCYThemagnitudeoftheinternalramp,whichisgeneratedfromthedutycycle,reducesfordutycycleseithersetof50%.
Thus,thereislessoverdriveonthemaincomparatorinputswhichtendstoslowtheconversiondown.
Theintrinsicmaximumoperatingfrequencyoftheconverterisabout10MHzto12MHz,whichiscontrolledtocirca.
6MHzbyafrequencylockedloop.
Whenhighorlowdutycyclesareencountered,thelooprunsoutofrangeandtheconversionfrequencyfallsbelow6MHz.
Thetendencyisfortheconvertertooperatemoretowardsa"constantinductorpeakcurrent"ratherthana"constantfrequency".
Inadditiontothisbehaviorwhichisobservedathighdutycycles,itisalsonotedatlowdutycycles.
Whentheconverterisrequiredtooperatetowardsthe6MHznominalatextremedutycycles,theapplicationcanbeassistedbydecreasingtheratioofinductance(L)totheoutputcapacitor'sequivalentserialinductance(ESL).
ThisincreasestheESLstepseenatthemaincomparator'sfeed-backinputthusdecreasingitspropagationdelay,henceincreasingtheswitchingfrequency.
POWER-SAVEMODEIftheloadcurrentdecreases,theconverterwillenterPowerSaveModeoperationautomatically.
Duringpower-savemodetheconverteroperatesindiscontinouscurrent(DCM)single-pulsePFMmode,whichproduceslowoutputripplecomparedwithotherPFMarchitectures.
Wheninpower-savemode,theconverterresumesitsoperationwhentheoutputvoltagetripsbelowthenominalvoltage.
Itrampsuptheoutputvoltagewithaminimumofonepulseandgoesintopower-savemodewhentheinductorcurrenthasreturnedtoazerosteadystate.
ThePFNon-timevariesinverselyproportionaltotheinputvoltageandproportionaltotheoutputvoltagegivingtheregulatedswitchingfrequencywhenissteady-state.
PFMmodeisleftandPWMoperationisenteredastheoutputcurrentcannolongerbesupportedinPFMmode.
Asaconsequence,theDCoutputvoltageistypicallypositionedca0.
5%abovethenominaloutputvoltageandthetransitionbetweenPFMandPWMisseamless.
Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback21ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comFigure48.
OperationinPFMModeandTransfertoPWMModeMODESELECTIONDependingonthesettingsofCONTROL1registerthedevicecanbeoperatedineithertheregulatedfrequencyPWMmodeorintheautomaticPWMandpower-savemode.
Inthismode,theconverteroperatesinaregulatedfrequencyPWMmodeatmoderatetoheavyloadsandinthePFMmodeduringlightloads,whichmaintainshighefficiencyoverawideloadcurrentrange.
Formoredetails,seetheCONTROL1registerdescription.
TheregulatedfrequencyPWMmodehasthetightestregulationandthebestline/loadtransientperformance.
Furthermore,thismodeofoperationallowssimplefilteringoftheswitchingfrequencyfornoise-sensitiveapplications.
InforcedPWMmode,theefficiencyislowercomparedtothepower-savemodeduringlightloads.
Itispossibletoswitchfrompower-savemode(PFM)toforcedPWMmodeduringoperationeitherviatheVSELsignalorbyre-programmingtheCONTROL1register.
Thisallowsadjustmentstotheconvertersoperationtomatchthespecificsystemrequirementsleadingtomoreefficientandflexiblepowermanagement.
ENABLEThedevicestartsoperationwhenENpinissethighandstartsupwiththesoftstart.
ThissignalisgatedbytheEN_DCDCbitdefinedinregisterVSEL0andVSEL1.
OnrisingedgeoftheENpin,alltheregistersareresetwiththeirdefaultvalues.
Enablingtheconverter'soperationviatheEN_DCDCbitdoesnotaffectinternalregistersettings.
Thisallowstheoutputvoltagetobeprogrammedtoothervaluesthanthedefaultvoltagebeforestartinguptheconverter.
Formoredetails,seetheVSEL0/1registerdescription.
PullingtheENpin,VSEL0[6]bitorVSEL1[6]bitlowforcesthedeviceintoshutdown,withashutdowncurrentasdefinedintheelectricalcharacteristicstable.
Inthismode,thePandN-channelMOSFETsareturnedoff,theinternalresistorfeedbackdividerisdisconnected,andtheentireinternal-controlcircuitryisswitchedoff.
Forproperoperation,theENpinmustbeterminatedandmustnotbeleftfloating.
Inaddition,dependingonthesettingofCONTROL2[6]bit,thedevicecanactivelydischargetheoutputcapacitorwhenitturnsoff.
Theintegrateddischargeresistorhasatypicalresistanceof15.
TherequiredtimetodischargetheoutputcapacitoratVOdependsonloadcurrentandtheoutputcapacitancevalue.
SOFTSTARTTheTPS62650-Q1hasaninternalsoft-startcircuitthatlimitstheinrushcurrentduringstart-up.
Thislimitsinputvoltagedropswhenabatteryorahigh-impedancepowersourceisconnectedtotheinputoftheconverter.
Thesoft-startsystemprogressivelyincreasestheon-timefromaminimumpulse-widthof35nsasafunctionoftheoutputvoltage.
Thismodeofoperationcontinuesforc.
a.
100μsafterenable.
Shouldtheoutputvoltagenothavereacheditstargetvaluebythistime,suchasinthecaseofheavyload,thesoft-starttransitionstoasecondmodeofoperation.
Theconverterwillthenoperateinacurrentlimitmode,specificallytheP-MOScurrentlimitissettohalfthenominallimitandtheN-channelMOSETremainsonuntiltheinductorcurrenthasreset.
Afterafurther100μs,thedevicerampsuptofullcurrentlimitoperationprovidingthattheoutputvoltagehasrisenabove0.
5V(approximately).
Therefore,thestart-uptimedependsontheoutputcapacitorandloadcurrent.
22SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013UNDERVOLTAGELOCKOUTTheundervoltagelockoutcircuitpreventsthedevicefrommisoperationatlowinputvoltages.
ItpreventstheconverterfromturningontheswitchorrectifierMOSFETunderundefinedconditions.
TheTPS62650-Q1devicehaveaUVLOthresholdsetto2.
05V(typical).
Fullyfunctionaloperationispermitteddownto2.
15Vinputvoltage.
SHORT-CIRCUITPROTECTIONTheTPS62650-Q1integratesaP-channelMOSFETcurrentlimittoprotectthedeviceagainstheavyloadorshortcircuits.
WhenthecurrentintheP-channelMOSFETreachesitscurrentlimit,theP-channelMOSFETisturnedoffandtheN-channelMOSFETisturnedon.
Theregulatorcontinuestolimitthecurrentonacycle-by-cyclebasis.
Assoonastheoutputvoltagefallsbelowca.
0.
4V,theconvertercurrentlimitisreducedtohalfofthenominalvalueandthePWROKbitisreset.
Becausetheshort-circuitprotectionisenabledduringstart-up,thedevicedoesnotdelivermorethanhalfofitsnominalcurrentlimituntiltheoutputvoltageexceedsapproximately0.
5V.
Thisneedstobeconsideredwhenaloadactingasacurrentsinkisconnectedtotheoutputoftheconverter.
THERMALSHUTDOWNAssoonasthejunctiontemperature,TJ,exceedstypically140°C,thedevicegoesintothermalshutdown.
Inthismode,theP-andN-channelMOSFETsareturnedoff.
Thedevicecontinuesitsoperationwhenthejunctiontemperatureagainfallsbelowtypically130°C.
VOLTAGEANDMODESELECTIONTheTPS62650-Q1featuresapin-selectableoutputvoltage.
VSELisprimarilyusedtoscaletheoutputvoltagebetweenactive(VSEL=HIGH)andsleepmode(VSEL=LOW).
Formaximumflexibility,itispossibletoreprogramtheoperatingmodeoftheconverter(e.
g.
forcedPWM,orautotransitionPFM/PWM)associatedwithVSELsignalviatheI2CinterfaceVSELoutputvoltageandmodeselectionisdefinedasfollowing:VSEL=LOW:––DC/DCoutputvoltagedeterminedbyVSEL0registervalue.
DC/DCmodeofoperationisdeterminedbyMODE0bitinCONTROL1register.
VSEL=HIGH:––DC/DCoutputvoltagedeterminedbyVSEL1registervalue.
DC/DCmodeofoperationisdeterminedbyMODE1bitinCONTROL1register.
TheapplicationprocessorprogramsviaI2CtheoutputvoltagesassociatedwiththetwostatesofVSELsignal:floor(VSEL0)androof(VSEL1)values.
TheapplicationprocessoralsowritestheDEFSLEWvalueintheCONTROL2registertocontroltheoutputvoltageramprate.
ThesetworegisterscanbecontinuouslyupdatedviaI2CtoprovidetheappropriateoutputvoltageaccordingtotheVSELinput.
ThevoltagechangeswiththeselectedramprateimmediatelyafterwritingtotheVSEL0orVSEL1register.
Table1showstheoutputvoltagestatesdependingonVSEL0,VSEL1registers,andVSELsignal.
Table1.
DynamicVoltageScalingFunctionalOverviewVSELPINVSEL0REGISTERVSEL1REGISTEROUTPUTVOLTAGELowNoactionNoactionFloorLowWritenewvalueNoactionChangetonewvalueLowNoactionWriteNochangestaysatfloorvoltageHighNoactionNoactionRoofHighWritenewvalueNoactionNochangestaysatroofvoltageHighNoactionWritenewvalueChangetonewvalueCopyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback23ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comInPFMmode,whentheoutputvoltageisprogrammedtoalowervaluebytogglingVSELsignalfromhightolow,PWROKisdefinedaslow,whiletheoutputcapacitorisdischargedbytheloaduntiltheconverterstartspulsingtomaintainthevoltagewithinregulation.
Inmultiple-stepmode,PWROKisdefinedaslowwhiletheoutputvoltageisrampingupordown.
Figure49.
PWROKFunctionalBehaviorVOLTAGERAMPCONTROLTheTPS62650-Q1offersavoltagerampratecontrolthatcanoperateintwodifferentmodes:Multiple-StepModeSingle-StepModeThemodeisselectedviaDEFSLEWcontrolbitsintheCONTROL2register.
Single-StepVoltageScalingMode(default),DEFSLEW[2:0]=[111]Insingle-stepmode,theTPS62650-Q1rampstheoutputvoltagewithmaximumslew-ratewhentransitioningbetweenthefloorandtheroofvoltages(switchtoahighervoltage).
Whenswitchingbetweentheroofandthefloorvoltages(transitiontoalowervoltage),therampratecontrolisdependentonthemodeselection(seeCONTROL1register)associatedwiththetargetregister(ForcedPWMorautotransitionPFM/PWM).
Table2showstherampratecontrolwhentransitioningtoalowervoltagewithDEFSLEWsettoimmediatetransition.
Table2.
RampRateControlvs.
TargetModeModeAssociatedwithTargetVoltageOutputVoltageRampRateForcedPWMImmediateDC/DCconverterstopsswitching.
PFM/PWMTimetorampdowndependsonoutputcapacitanceandloadcurrentForinstance,whentheoutputisprogrammedtotransitiontoalowervoltagewithPFMoperationenabled,theTPS62650-Q1rampsdowntheoutputvoltagewithoutcontrollingtheramprateorhavingintermediatemicro-steps.
TherequiredtimetorampdownthevoltagedependsonthecapacitancepresentattheoutputoftheTPS62650-Q1andontheloadcurrent.
Fromanoverallsystemperspective,thisisthemostefficientwaytoperformdynamicvoltagescaling.
Multiple-StepVoltageScalingMode,DEFSLEW[2:0]=[000]to[110]Inmultiple-stepmodetheTPS62650-Q1controlstheoutputvoltageramprateregardlessoftheloadcurrentandmodeofoperation(e.
g.
ForcedPWMorPFM/PWM).
Thevoltagerampcontrolisdonebyadjustingthetimebetweenthevoltagemicro-steps.
24SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013THEORYOFOPERATIONSerialInterfaceDescriptionI2Cisa2-wireserialinterfacedevelopedbyPhilipsSemiconductor(seeI2C-BusSpecification,Version2.
1,January2000).
Thebusconsistsofadataline(SDA)andaclockline(SCL)withpull-upstructures.
Whenthebusisidle,bothSDAandSCLlinesarepulledhigh.
AlltheI2CcompatibledevicesconnecttotheI2CbusthroughopendrainI/Opins,SDAandSCL.
Amasterdevice,usuallyamicrocontrolleroradigitalsignalprocessor,controlsthebus.
ThemasterisresponsibleforgeneratingtheSCLsignalanddeviceaddresses.
ThemasteralsogeneratesspecificconditionsthatindicatetheSTARTandSTOPofdatatransfer.
Aslavedevicereceivesand/ortransmitsdataonthebusundercontrolofthemasterdevice.
TheTPS62650-Q1deviceworksasaslaveandsupportsthefollowingdatatransfermodes,asdefinedintheI2C-BusSpecification:standardmode(100kbps),fastmode(400kbps),fastmodeplus(1Mbps)andhigh-speedmode(upto3.
4Mbps).
Theinterfaceaddsflexibilitytothepowersupplysolution,enablingmostfunctionstobeprogrammedtonewvaluesdependingontheinstantaneousapplicationrequirements.
Registercontentsremainintactaslongassupplyvoltageremainsabove2.
1V(typical).
Thedatatransferprotocolforstandard,fastandfastplusmodesisexactlythesame,therefore,theyarereferredtoasF/S-modeinthisdocument.
Theprotocolforhigh-speedmodeisdifferentfromtheF/S-mode,anditisreferredtoasHS-mode.
TheTPS62650-Q1devicesupports7-bitaddressing;10-bitaddressingandgeneralcalladdressarenotsupported.
TheTPS62650-Q1devicehasa7-bitaddresswithtwobitsfactoryprogrammableallowinguptofourdc/dcconverterstobeconnectedtothesamebus.
The4MSBsare1001andtheLSBis0.
Standard-,Fast-andFast-ModePlusProtocolThemasterinitiatesdatatransferbygeneratingastartcondition.
Thestartconditioniswhenahigh-to-lowtransitionoccursontheSDAlinewhileSCLishigh,seeFigure50.
AllI2C-compatibledevicesshouldrecognizeastartcondition.
ThemasterthengeneratestheSCLpulses,andtransmitsthe7-bitaddressandtheread/writedirectionbitR/WontheSDAline.
Duringalltransmissions,themasterensuresthatdataisvalid.
AvaliddataconditionrequirestheSDAlinetobestableduringtheentirehighperiodoftheclockpulse,seeFigure51.
Alldevicesrecognizetheaddresssentbythemasterandcompareittotheirinternalfixedaddresses.
Onlytheslavedevicewithamatchingaddressgeneratesanacknowledge,seeFigure52,bypullingtheSDAlinelowduringtheentirehighperiodoftheninthSCLcycle.
Upondetectingthisacknowledge,themasterknowsthatthecommunicationlinkwithaslavehasbeenestablished.
ThemastergeneratesfurtherSCLcyclestoeithertransmitdatatotheslave(R/Wbit1)orreceivedatafromtheslave(R/Wbit0).
Ineithercase,thereceiverneedstoacknowledgethedatasentbythetransmitter.
Anacknowledgesignalcaneitherbegeneratedbythemasterorbytheslave,dependingonwhichoneisthereceiver.
9-bitvaliddatasequencesconsistingof8-bitdataand1-bitacknowledgecancontinueaslongasnecessary.
Tosignaltheendofthedatatransfer,themastergeneratesastopconditionbypullingtheSDAlinefromlowtohighwhiletheSCLlineishigh,seeFigure50.
Thisreleasesthebusandstopsthecommunicationlinkwiththeaddressedslave.
AllI2Ccompatibledevicesmustrecognizethestopcondition.
Uponthereceiptofastopcondition,alldevicesknowthatthebusisreleased,andtheywaitforastartconditionfollowedbyamatchingaddressAttemptingtoreaddatafromregisteraddressesnotlistedinthissectionresultsin00hbeingreadout.
Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback25ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comH/S-ModeProtocolWhenthebusisidle,bothSDAandSCLlinesarepulledhighbythepull-updevices.
ThemastergeneratesastartconditionfollowedbyavalidserialbytecontainingHSmastercode00001XXX.
ThistransmissionismadeinF/S-modeatnomorethan400Kbps.
NodeviceisallowedtoacknowledgetheHSmastercode,butalldevicesmustrecognizeitandswitchtheirinternalsettingtosupport3.
4-Mbpsoperation.
Themasterthengeneratesarepeatedstartcondition(arepeatedstartconditionhasthesametimingasthestartcondition).
Afterthisrepeatedstartcondition,theprotocolisthesameasF/S-mode,exceptthattransmissionspeedsupto3.
4Mbpsareallowed.
AstopconditionendstheHS-modeandswitchesalltheinternalsettingsoftheslavedevicestosupporttheF/S-mode.
Insteadofusingastopcondition,repeatedstartconditionsareusedtosecurethebusinHS-mode.
AttemptingtoreaddatafromregisteraddressesnotlistedinthissectionresultsinFFhbeingreadout.
Figure50.
STARTandSTOPConditionsFigure51.
BitTransferontheSerialInterfaceFigure52.
AcknowledgeontheI2CBus26SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013Figure53.
BusProtocolTPS62650-Q1I2CUpdateSequenceTheTPS62650-Q1requiresastartcondition,avalidI2Caddress,aregisteraddressbyte,andadatabyteforasingleupdate.
Afterthereceiptofeachbyte,TPS62650-Q1deviceacknowledgesbypullingtheSDAlinelowduringthehighperiodofasingleclockpulse.
AvalidI2CaddressselectstheTPS62650-Q1.
TPS62650-Q1performsanupdateonthefallingedgeoftheLSBbyte.
WhentheTPS62650-Q1isinhardwareshutdown(ENpintiedtoground)thedevicecannotbeupdatedviatheI2Cinterface.
Conversely,theI2Cinterfaceisfullyfunctionalduringsoftwareshutdown(EN_DCDCbit=0).
Figure54.
"Write"DataTransferFormatinStandard,Fast-andFast-PlusModesFigure55.
"Read"DataTransferFormatinStandard,Fast-andFast-PlusModesCopyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback27ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comFigure56.
DataTransferFormatinH/S-ModeSlaveAddressByteMSBLSBX1001A2A10TheslaveaddressbyteisthefirstbytereceivedfollowingtheSTARTconditionfromthemasterdevice.
Thefirstfourbits(MSBs)oftheaddressarefactorypresetto1001.
Thenexttwobits(A2,A1)oftheaddressaredeviceoptiondependent.
TheLSBbit(A0)isalsofactorypresetto0.
Upto4TPS62650-Q1typeofdevicescanbeconnectedtothesameI2C-Bus.
Seetheorderinginformationtableformoredetails.
RegisterAddressByteMSBLSB000000D1D0Followingthesuccessfulacknowledgmentoftheslaveaddress,thebusmastersendsabytetotheTPS62650-Q1,whichcontainstheaddressoftheregistertobeaccessed.
TheTPS62650-Q1containsfour8-bitregistersaccessibleviaabidirectionalI2C-businterface.
Allinternalregistershavereadandwriteaccess.
28SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013REGISTERDESCRIPTIONVSEL0REGISTERDESCRIPTIONMemorylocation:0x00DescriptionEN_DCDCFREEVSM0[5:0]BitsD7D6D5D4D3D2D1D0MemorytypeR/WR/WR/WR/WR/WR/WR/WR/WDefaultvalue10XXXXXXBitDescriptionEN_DCDCEnable/DisableDC/DCoperation.
ThisbitgatestheexternalENpincontrolsignal.
ThisbitismirroredinVSEL1register.
0:DeviceinshutdownregardlessoftheENsignal.
1:DeviceenabledwhenENishigh,disabledwhenENislow.
VSM0[5:0]Outputvoltageselectionbits(floorvoltage).
(1)6-bitunsignedbinarylinearcoding.
Outputvoltage=Minimumoutputvoltage+(VSM0[5:0]x12.
5mV)(1)Registervalueissetaccordingtothedefaultoutputvoltage,seeorderinginformationtable.
VSEL1REGISTERDESCRIPTIONMemorylocation:0x01DescriptionEN_DCDCFREEVSM1[5:0]BitsD7D6D5D4D3D2D1D0MemorytypeR/WR/WR/WR/WR/WR/WR/WR/WDefaultvalue10XXXXXXBitDescriptionEN_DCDCEnable/DisableDC/DCoperation.
ThisbitgatestheexternalENpincontrolsignal.
ThisbitismirroredinVSEL0register.
0:DeviceinshutdownregardlessoftheENsignal.
1:DeviceenabledwhenENishigh,disabledwhenENislow.
VSM1[5:0]Outputvoltageselectionbits(roofvoltage).
(1)6-bitunsignedbinarylinearcoding.
Outputvoltage=Minimumoutputvoltage+(VSM1[5:0]x12.
5mV)(1)Registervalueissetaccordingtothedefaultoutputvoltage,seeorderinginformationtable.
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comCONTROL1REGISTERDESCRIPTIONMemorylocation:0x02DescriptionRESERVEDRESERVEDFREEFREEMODE_CTRL[1:0]MODE1MODE0BitsD7D6D5D4D3D2D1D0MemorytypeRRR/WR/WR/WR/WR/WR/WDefaultvalue00000000BitDescriptionMODE_CTRL[1:0]Modecontrolbits.
(1)00:OperationfollowsMODE0,MODE1.
01:PFM/PWMoperationindependentofVSELsignal.
10:ForcedPWMoperationindependentofVSELsignal.
11:PFM/PWMoperationindependentofVSELsignal.
MODE1VSELhigh(roofvoltage)operatingmodeselectionbit.
0:ForcedPWM.
1:PFM/PWMautomatictransition.
MODE0VSELlow(floorvoltage)operatingmodeselectionbit.
0,1:PFM/PWMautomatictransition(noeffect).
(1)Seetheorderinginformationtabletoverifythevalidityofthisoption.
CONTROL2REGISTERDESCRIPTIONMemorylocation:0x03DescriptionFREEOUTPUT_DISCHARGEPWROKFREEFREEDEFSLEWBitsD7D6D5D4D3D2D1D0MemorytypeR/WR/WR/WR/WR/WR/WR/WR/WDefaultvalue01000111BitDescriptionOUTPUT_Outputcapacitorauto-dischargecontrolbit.
DISCHARGE0:Theoutputcapacitorisnotactivelydischargedwhentheconverterisdisabled.
1:Theoutputcapacitorisdischargedthroughaninternalresistorwhentheconverterisdisabled.
PWROKPowergoodbit.
0:Theoutputvoltageisnotwithinitsregulationlimits.
1:Theoutputvoltageisinregulation.
DEFSLEWOutputvoltageslew-ratecontrolbits.
000:0.
15mV/μs001:0.
3mV/μs010:0.
6mV/μs011:1.
2mV/μs100:2.
4mV/μs101:4.
8mV/μs110:9.
6mV/μs111:Immediate30SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013APPLICATIONINFORMATIONINDUCTORSELECTIONTheTPS62650-Q1seriesofstep-downconvertershavebeenoptimizedtooperatewithaneffectiveinductancevalueintherangeof0.
3μHto1.
3μHandwithoutputcapacitorsintherangeof4.
7μFto10μF.
TheinternalcompensationisoptimizedtooperatewithanoutputfilterofL=0.
47μHandCO=4.
7μF.
Largerorsmallerinductorvaluescanbeusedtooptimizetheperformanceofthedeviceforspecificoperationconditions.
Formoredetails,refertothesection"checkingloopstability".
Theinductorvalueaffectsitspeak-to-peakripplecurrent,thePWM-to-PFMtransitionpoint,theoutputvoltagerippleandtheefficiency.
Theselectedinductorhastoberatedforitsdcresistanceandsaturationcurrent.
Theinductorripplecurrent(ΔIL)decreaseswithhigherinductanceandincreaseswithhigherVIorVO.
with:fSW=switchingfrequency(6MHztypical)L=inductorvalueΔIL=peak-to-peakinductorripplecurrentIL(MAX)=maximuminductorcurrent(1)Inhigh-frequencyconverterapplications,theefficiencyisessentiallyaffectedbytheinductorACresistance(i.
e.
qualityfactor)andtoasmallerextentbytheinductorDCRvalue.
Toachievehighefficiencyoperation,careshouldbetakeninselectinginductorsfeaturingaqualityfactorabove25attheswitchingfrequency.
IncreasingtheinductorvalueproduceslowerRMScurrents,butdegradestransientresponse.
Foragivenphysicalinductorsize,increasedinductanceusuallyresultsinaninductorwithlowersaturationcurrent.
ThetotallossesofthecoilconsistofboththelossesintheDCresistance(R(DC))andthefollowingfrequency-dependentcomponents:Thelossesinthecorematerial(magnetichysteresisloss,especiallyathighswitchingfrequencies)Additionallossesintheconductorfromtheskineffect(currentdisplacementathighfrequencies)Magneticfieldlossesoftheneighboringwindings(proximityeffect)RadiationlossesThefollowinginductorseriesfromdifferentsuppliershavebeenusedwiththeTPS62650-Q1converters.
Table3.
ListofInductorsMANUFACTURERSERIESDIMENSIONSLQM21PN1R0NGR2.
0x1.
2x1.
0max.
heightLQM21PNR54MG02.
0x1.
2x1.
0max.
heightMURATALQM21PNR47MG02.
0x1.
2x1.
0max.
heightLQM2MPN1R0NG02.
0x1.
6x1.
0max.
heightTOKOMDT2012-CX1R0A2.
0x1.
2x1.
0max.
heightFDKMIPS2012D1R0-X22.
0x1.
2x1.
0max.
heightCopyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback31ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
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comOUTPUTCAPACITORSELECTIONTheadvancedfast-responsevoltagemodecontrolschemeoftheTPS62650-Q1allowstheuseoftinyceramiccapacitors.
CeramiccapacitorswithlowESRvalueshavethelowestoutputvoltagerippleandarerecommended.
Forbestperformance,thedeviceshouldbeoperatedwithaminimumeffectiveoutputcapacitanceof1.
6μF.
TheoutputcapacitorrequireseitheranX7RorX5Rdielectric.
Y5VandZ5Udielectriccapacitors,asidefromtheirwidevariationincapacitanceovertemperature,becomeresistiveathighfrequencies.
Atnominalloadcurrent,thedeviceoperatesinPWMmodeandtheoveralloutputvoltagerippleisthesumofthevoltagestepcausedbytheoutputcapacitorESLandtheripplecurrentflowingthroughtheoutputcapacitorimpedance.
Atlightloads,theoutputcapacitorlimitstheoutputripplevoltageandprovidesholdupduringlargeloadtransitions.
A4.
7μFcapacitortypicallyprovidessufficientbulkcapacitancetostabilizetheoutputduringlargeloadtransitions.
Thetypicaloutputvoltagerippleis1.
5%ofthenominaloutputvoltageVO.
TheoutputvoltagerippleduringPFMmodeoperationcanbekeptsmall.
ThePFMpulseistimecontrolled,whichallowstomodifythechargetransferredtotheoutputcapacitorbythevalueoftheinductor.
TheresultingPFMoutputvoltagerippleandPFMfrequencydependinfirstorderonthesizeoftheoutputcapacitorandtheinductorvalue.
ThePFMfrequencydecreaseswithsmallerinductorvaluesandincreaseswithlargeronce.
Increasingtheoutputcapacitorvalueandtheeffectiveinductancewillminimizetheoutputripplevoltage.
INPUTCAPACITORSELECTIONBecauseofthenatureofthebuckconverterhavingapulsatinginputcurrent,alowESRinputcapacitorisrequiredtopreventlargevoltagetransientsthatcancausemisbehaviorofthedeviceorinterferenceswithothercircuitsinthesystem.
Formostapplications,a2.
2μFor4.
7μFcapacitorissufficient.
Iftheapplicationexhibitsanoisyorerraticswitchingfrequency,theremedywillprobablybefoundbyexperimentingwiththevalueoftheinputcapacitor.
Takecarewhenusingonlyceramicinputcapacitors.
Whenaceramiccapacitorisusedattheinputandthepowerisbeingsuppliedthroughlongwires,suchasfromawalladapter,aloadstepattheoutputcaninduceringingattheVINpin.
Thisringingcancoupletotheoutputandbemistakenasloopinstabilityorcouldevendamagethepart.
Additional"bulk"capacitance(electrolyticortantalum)shouldinthiscircumstancebeplacedbetweenCIandthepowersourceleadtoreduceringingthancanoccurbetweentheinductanceofthepowersourceleadsandCI.
CHECKINGLOOPSTABILITYThefirststepofcircuitandstabilityevaluationistolookfromasteady-stateperspectiveatthefollowingsignals:Switchingnode,SWInductorcurrent,ILOutputripplevoltage,VO(AC)Thesearethebasicsignalsthatneedtobemeasuredwhenevaluatingaswitchingconverter.
Whentheswitchingwaveformshowslargedutycyclejitterortheoutputvoltageorinductorcurrentshowsoscillations,theregulationloopmaybeunstable.
Thisisoftenaresultofboardlayoutand/orL-Ccombination.
Asanextstepintheevaluationoftheregulationloop,theloadtransientresponseistested.
ThetimebetweentheapplicationoftheloadtransientandtheturnonoftheP-channelMOSFET,theoutputcapacitormustsupplyallofthecurrentrequiredbytheload.
VOimmediatelyshiftsbyanamountequaltoΔI(LOAD)xESR,whereESRistheeffectiveseriesresistanceofCO.
ΔI(LOAD)beginstochargeordischargeCOgeneratingafeedbackerrorsignalusedbytheregulatortoreturnVOtoitssteady-statevalue.
TheresultsaremosteasilyinterpretedwhenthedeviceoperatesinPWMmode.
Duringthisrecoverytime,VOcanbemonitoredforsettlingtime,overshootorringingthathelpsjudgetheconverter'sstability.
Withoutanyringing,theloophasusuallymorethan45°ofphasemargin.
Becausethedampingfactorofthecircuitryisdirectlyrelatedtoseveralresistiveparameters(e.
g.
,MOSFETrDS(on))thataretemperaturedependant,theloopstabilityanalysishastobedoneovertheinputvoltagerange,loadcurrentrange,andtemperaturerange.
32SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
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comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013LAYOUTCONSIDERATIONSAsforallswitchingpowersupplies,thelayoutisanimportantstepinthedesign.
High-speedoperationoftheTPS62650-Q1devicesdemandcarefulattentiontoPCBlayout.
Caremustbetakeninboardlayouttogetthespecifiedperformance.
Ifthelayoutisnotcarefullydone,theregulatorcouldshowpoorlineand/orloadregulation,stabilityandswitchingfrequencyissuesaswellasEMIproblems.
Itiscriticaltoprovidealowinductance,impedancegroundpath.
Therefore,usewideandshorttracesforthemaincurrentpaths.
TheinputcapacitorshouldbeplacedascloseaspossibletotheICpinsaswellastheinductorandoutputcapacitor.
InordertogetanoptimumESLstep,theoutputvoltagefeedbackpoint(FB)shouldbetakenintheoutputcapacitorpath,approximately1mmawayforit.
Thefeed-backlineshouldberoutedawayfromnoisycomponentsandtraces(e.
g.
SWline).
Figure57.
SuggestedLayout(Top)Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback33ProductFolderLinks:TPS62650-Q1TPS62650-Q1SLVSB62B–MARCH2012–REVISEDFEBRUARY2013www.
ti.
comThermalInformationImplementationofintegratedcircuitsinlow-profileandfine-pitchsurface-mountpackagestypicallyrequiresspecialattentiontopowerdissipation.
Manysystem-dependantissuessuchasthermalcoupling,airflow,addedheatsinks,andconvectionsurfaces,andthepresenceofotherheat-generatingcomponents,affectthepower-dissipationlimitsofagivencomponent.
Threebasicapproachesforenhancingthermalperformancearelistedbelow:ImprovingthepowerdissipationcapabilityofthePCBdesignImprovingthethermalcouplingofthecomponenttothePCBIntroducingairflowinthesystemThemaximumrecommendedjunctiontemperature(TJ)oftheTPS62650-Q1deviceis105°C.
Thethermalresistanceofthe9-pinCSPpackage(YFF)isRθJA=105°C/W.
TheregulatoroperationisspecifiedtoamaximumambienttemperatureTAof105°C.
Therefore,themaximumpowerdissipationisabout200mW.
(2)PACKAGESUMMARYCHIPSCALEPACKAGECHIPSCALEPACKAGE(BOTTOMVIEW)(TOPVIEW)Code:YM-YearMonthdatecodeS-assemblysitecodeCC-ChipcodeLLLL-Lottracecode34SubmitDocumentationFeedbackCopyright2012–2013,TexasInstrumentsIncorporatedProductFolderLinks:TPS62650-Q1TPS62650-Q1www.
ti.
comSLVSB62B–MARCH2012–REVISEDFEBRUARY2013REVISIONHISTORYChangesfromRevisionA(March2012)toRevisionBPageChanged"TA"to"TJ"2Copyright2012–2013,TexasInstrumentsIncorporatedSubmitDocumentationFeedback35ProductFolderLinks:TPS62650-Q1PACKAGEOPTIONADDENDUMwww.
ti.
com11-Apr-2013Addendum-Page1PACKAGINGINFORMATIONOrderableDeviceStatus(1)PackageTypePackageDrawingPinsPackageQtyEcoPlan(2)Lead/BallFinishMSLPeakTemp(3)OpTemp(°C)Top-SideMarkings(4)SamplesTPS62650TYFFRQ1ACTIVEDSBGAYFF93000Green(RoHS&noSb/Br)SNAGCULevel-1-260C-UNLIM-40to105Q1(1)Themarketingstatusvaluesaredefinedasfollows:ACTIVE:Productdevicerecommendedfornewdesigns.
LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect.
NRND:Notrecommendedfornewdesigns.
Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartinanewdesign.
PREVIEW:Devicehasbeenannouncedbutisnotinproduction.
Samplesmayormaynotbeavailable.
OBSOLETE:TIhasdiscontinuedtheproductionofthedevice.
(2)EcoPlan-Theplannedeco-friendlyclassification:Pb-Free(RoHS),Pb-Free(RoHSExempt),orGreen(RoHS&noSb/Br)-pleasecheckhttp://www.
ti.
com/productcontentforthelatestavailabilityinformationandadditionalproductcontentdetails.
TBD:ThePb-Free/Greenconversionplanhasnotbeendefined.
Pb-Free(RoHS):TI'sterms"Lead-Free"or"Pb-Free"meansemiconductorproductsthatarecompatiblewiththecurrentRoHSrequirementsforall6substances,includingtherequirementthatleadnotexceed0.
1%byweightinhomogeneousmaterials.
Wheredesignedtobesolderedathightemperatures,TIPb-Freeproductsaresuitableforuseinspecifiedlead-freeprocesses.
Pb-Free(RoHSExempt):ThiscomponenthasaRoHSexemptionforeither1)lead-basedflip-chipsolderbumpsusedbetweenthedieandpackage,or2)lead-baseddieadhesiveusedbetweenthedieandleadframe.
ThecomponentisotherwiseconsideredPb-Free(RoHScompatible)asdefinedabove.
Green(RoHS&noSb/Br):TIdefines"Green"tomeanPb-Free(RoHScompatible),andfreeofBromine(Br)andAntimony(Sb)basedflameretardants(BrorSbdonotexceed0.
1%byweightinhomogeneousmaterial)(3)MSL,PeakTemp.
--TheMoistureSensitivityLevelratingaccordingtotheJEDECindustrystandardclassifications,andpeaksoldertemperature.
(4)MultipleTop-SideMarkingswillbeinsideparentheses.
OnlyoneTop-SideMarkingcontainedinparenthesesandseparatedbya"~"willappearonadevice.
IfalineisindentedthenitisacontinuationofthepreviouslineandthetwocombinedrepresenttheentireTop-SideMarkingforthatdevice.
ImportantInformationandDisclaimer:TheinformationprovidedonthispagerepresentsTI'sknowledgeandbeliefasofthedatethatitisprovided.
TIbasesitsknowledgeandbeliefoninformationprovidedbythirdparties,andmakesnorepresentationorwarrantyastotheaccuracyofsuchinformation.
Effortsareunderwaytobetterintegrateinformationfromthirdparties.
TIhastakenandcontinuestotakereasonablestepstoproviderepresentativeandaccurateinformationbutmaynothaveconducteddestructivetestingorchemicalanalysisonincomingmaterialsandchemicals.
TIandTIsuppliersconsidercertaininformationtobeproprietary,andthusCASnumbersandotherlimitedinformationmaynotbeavailableforrelease.
InnoeventshallTI'sliabilityarisingoutofsuchinformationexceedthetotalpurchasepriceoftheTIpart(s)atissueinthisdocumentsoldbyTItoCustomeronanannualbasis.
OTHERQUALIFIEDVERSIONSOFTPS62650-Q1:Catalog:TPS62650PACKAGEOPTIONADDENDUMwww.
ti.
com11-Apr-2013Addendum-Page2NOTE:QualifiedVersionDefinitions:Catalog-TI'sstandardcatalogproductTAPEANDREELINFORMATION*AlldimensionsarenominalDevicePackageTypePackageDrawingPinsSPQReelDiameter(mm)ReelWidthW1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W(mm)Pin1QuadrantTPS62650TYFFRQ1DSBGAYFF93000180.
08.
41.
451.
450.
84.
08.
0Q1PACKAGEMATERIALSINFORMATIONwww.
ti.
com17-Oct-2019PackMaterials-Page1*AlldimensionsarenominalDevicePackageTypePackageDrawingPinsSPQLength(mm)Width(mm)Height(mm)TPS62650TYFFRQ1DSBGAYFF93000182.
0182.
020.
0PACKAGEMATERIALSINFORMATIONwww.
ti.
com17-Oct-2019PackMaterials-Page2www.
ti.
comPACKAGEOUTLINEC0.
625MAX0.
300.
120.
8TYP0.
8TYP0.
4TYP0.
4TYP9X0.
30.
2BEADDSBGA-0.
625mmmaxheightYFF0009DIESIZEBALLGRIDARRAY4219552/A05/2016NOTES:1.
Alllineardimensionsareinmillimeters.
Anydimensionsinparenthesisareforreferenceonly.
DimensioningandtolerancingperASMEY14.
5M.
2.
Thisdrawingissubjecttochangewithoutnotice.
BALLA1CORNERSEATINGPLANEBALLTYP0.
05CB1230.
015CABSYMMSYMMACSCALE10.
000www.
ti.
comEXAMPLEBOARDLAYOUT9X(0.
23)(0.
4)TYP(0.
4)TYP(0.
23)METAL0.
05MAXSOLDERMASKOPENINGMETALUNDERSOLDERMASK(0.
23)SOLDERMASKOPENING0.
05MINDSBGA-0.
625mmmaxheightYFF0009DIESIZEBALLGRIDARRAY4219552/A05/2016NOTES:(continued)3.
Finaldimensionsmayvaryduetomanufacturingtoleranceconsiderationsandalsoroutingconstraints.
Formoreinformation,seeTexasInstrumentsliteraturenumberSNVA009(www.
ti.
com/lit/snva009).
SYMMSYMMLANDPATTERNEXAMPLESCALE:30XC123ABNON-SOLDERMASKDEFINED(PREFERRED)SOLDERMASKDETAILSNOTTOSCALESOLDERMASKDEFINEDwww.
ti.
comEXAMPLESTENCILDESIGN(0.
4)TYP(0.
4)TYP9X(0.
25)(R0.
05)TYPMETALTYPDSBGA-0.
625mmmaxheightYFF0009DIESIZEBALLGRIDARRAY4219552/A05/2016NOTES:(continued)4.
Lasercuttingapertureswithtrapezoidalwallsandroundedcornersmayofferbetterpasterelease.
SYMMSYMMC123ABSOLDERPASTEEXAMPLEBASEDON0.
1mmTHICKSTENCILSCALE:30XIMPORTANTNOTICEANDDISCLAIMERTIPROVIDESTECHNICALANDRELIABILITYDATA(INCLUDINGDATASHEETS),DESIGNRESOURCES(INCLUDINGREFERENCEDESIGNS),APPLICATIONOROTHERDESIGNADVICE,WEBTOOLS,SAFETYINFORMATION,ANDOTHERRESOURCES"ASIS"ANDWITHALLFAULTS,ANDDISCLAIMSALLWARRANTIES,EXPRESSANDIMPLIED,INCLUDINGWITHOUTLIMITATIONANYIMPLIEDWARRANTIESOFMERCHANTABILITY,FITNESSFORAPARTICULARPURPOSEORNON-INFRINGEMENTOFTHIRDPARTYINTELLECTUALPROPERTYRIGHTS.
TheseresourcesareintendedforskilleddevelopersdesigningwithTIproducts.
Youaresolelyresponsiblefor(1)selectingtheappropriateTIproductsforyourapplication,(2)designing,validatingandtestingyourapplication,and(3)ensuringyourapplicationmeetsapplicablestandards,andanyothersafety,security,orotherrequirements.
Theseresourcesaresubjecttochangewithoutnotice.
TIgrantsyoupermissiontousetheseresourcesonlyfordevelopmentofanapplicationthatusestheTIproductsdescribedintheresource.
Otherreproductionanddisplayoftheseresourcesisprohibited.
NolicenseisgrantedtoanyotherTIintellectualpropertyrightortoanythirdpartyintellectualpropertyright.
TIdisclaimsresponsibilityfor,andyouwillfullyindemnifyTIanditsrepresentativesagainst,anyclaims,damages,costs,losses,andliabilitiesarisingoutofyouruseoftheseresources.
TI'sproductsareprovidedsubjecttoTI'sTermsofSale(www.
ti.
com/legal/termsofsale.
html)orotherapplicabletermsavailableeitheronti.
comorprovidedinconjunctionwithsuchTIproducts.
TI'sprovisionoftheseresourcesdoesnotexpandorotherwisealterTI'sapplicablewarrantiesorwarrantydisclaimersforTIproducts.
MailingAddress:TexasInstruments,PostOfficeBox655303,Dallas,Texas75265Copyright2019,TexasInstrumentsIncorporated

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