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AristaR3-Series-MultipleGenerationsofInnovationsThegrowingdemandforhigherbandwidthinacceleratedtimeframesisdrivenbyhyper-scalecloudnetworksandServiceProviders.
Theimminentavailabilityof5GandEdgecomputingwithhigherbandwidthdevices,IoTdata,newmodelsforvideoconsumptionandongoingCyber-securitychallengesraisestheexpectationofintelligentnetworkservices.
Customerrequirementsrarelycallforanentirelynewnetworkarchitecture.
Newtechnology,howeverinnovative,mustpreserveexistinginvestments,providebackwardandforwardcompatibility,andenablemigration.
Manysystemvendorsseethispaceofchangeasafundamentalchallengethatshouldbeaddressedwithnewandradicallydifferentforwardingarchitectures,pipelinesoroperatingmodelsthatdisruptcustomers,ratherthanfacilitatingtheevolutionaryapproach.
AristatakesanevolutionaryapproachwhenitcomestofacingthesechallengeswiththenewR3generation.
TheAristaR3-SeriescomprisesasetofproductsinthelatestgenerationofthehighlysuccessfulArista7500and7280Seriesplatforms.
TheArista7500Serieswasfirstreleasedin2010asahighdensity10Gsystemandoverthelast10yearshasevolvedwitheachnewgenerationofferinghigherperformanceandmorecapabilitiesforrouting,telemetryandnetworksecurity,withinvestmentprotection.
Thelatestgenerationoftheseplatformsarethehighcapacity7800R3,7500R3,andthe7280R3,offeringabreadthofformfactor,performanceanddensitythatscalesfrom4Tbpstoover460Tbps,withallsystemssharingcommonandconsistentcapabilities.
ThispaperintroducesthelatestgenerationoftheR-Series,outlinesthecapabilitiesandinnovationsthataddresstheconstantlyevolvingnetworkchallenges,andtheintroductionof400Gnetworks.
Figure1:AristaR3-Seriesfrom4Tbpsto460TbpsCommonEOSAristaEOSInnovationsand10YearsofExperienceSince2010,whentheveryfirst10Gbased7500Seriesand1Gbased7048Serieswerelaunched,eachnewgenerationoffixedandmodularsystemshasintroducedasetofinnovationsdrivenbyAristaEOS.
Thefirstgenerationofdeepbuffermodularandfixedsystemsdroveadvancedtwo-tierdesignsforOilandGasresearch,HighPerformanceCompute,Onlineretailers,bigdataandsearchthatsetthestandardforthenext10years.
The7500SerieswassowellreceivedthatitwasawardedNetworkWorldBestofInteropin2010.
The2013launchofthe7500Eand7280SEplatformsexpandedSpineandLeafnetworksto40Gand100G,andintroducedaseriesofinnovationsincludingTapAggregation,latencymonitoring,Coherent100GDWDMwithintegratedMACsecencryptionforDCIandsupportforVXLANforoverlaynetworks.
In2013the7500ESerieswasawardedasecondbestofInterop,recognizingtheinvestmentprotection,coupledwiththeseinnovationsand3Xperformanceincrease.
The2016releaseofthe7500Rand7280RUniversalSpinebroughtsupportforCloud-graderoutingforInterneteXchange(IX)providers,CloudWAN,nextgenerationcableoperatorsandOverTheTop(OTT)servicesandContentDeliveryNetworks(CDN).
TheR-SeriesofscalableplatformssupportinternetscaleroutingwithFlexRoute,EOSNetDBinnovations,modernprotocolsandopenautomation,whichallowedforthetransformationofroutingarchitecturesandreplacedlegacyrouters.
Onthe7500R2and7280R2Series,AlgoMatchandAcceleratedsFlowprovideunprecedentedlevelsofsecureaccesscontrolanddeepvisibilityintohighcapacity100GnetworksandMACsecwhichwasexpandedforDataCenterInterconnect(DCI)solutions.
ThenextgenerationoftheR-Seriesisavailableinthe7800R3,7500R3andthe7280R3SerieswithsupportformoreEOSdriveninnovations.
ProvenArchitectureInvestmentProtectionCustomersrarelygetacleansheetofpaperwithwhichtodesignnetworks.
Newsystemshavetocoexistwithpreviousnetworksdesigns,andofferinplaceupgrades.
TheR3-Seriesprovidecontinuedinvestmentprotection,fromtheoriginal7500Seriesthroughtothe7500R3Series.
Interoperabilityofthe7500R3Serieswiththepreviousgenerationoflinecardsandfabricsallowsmixinggenerationstopreserveexistinginfrastructure.
ReuseofcommonarchitectureacrosstheR3-Seriessystemsprovidesacommonsetofbuildingblocks,leveragedtoacceleratetimetoserviceofnewsystems.
Figure2:Arista7500Series10yearsofcontinuousinnovationsandexperienceSingleOSacrosstheentireportfolioaddressesthechallengeofqualifyingnewproducts,whereexistingtools,processesandfeaturesworkasexpected.
Thisisincomparisontothechallengeofintroducinganallnewproductwithadifferentoperatingsystemanddissimilarfeatures.
FeatureRichbuildingonthecodebaseofEOSandleveraging1000'sofsoftwaredevelopmentyearswithcommonplatformsallowsforfasterqualificationwithouthavingtowaitforfeaturestobereleased.
AristaEOSisamodernoperatingsystemandcontinuestoevolve,withongoingrefactoringofmajoraspectsofthecode,addingscale,newfeaturesandsupportfornewsilicon,allwithoutsacrificingsupportforexistingfeaturesandcodequality.
ConsistentVoQnon-blockingfairdeliveryTheAristaR3-Seriesleveragesadeepbuffervirtualoutputqueue(VOQ)architecturewithacellbasedfabricthatis100%efficientandprovidesconsistentlylowlatencyandjitter,eliminateshead-of-line(HOL)blockingandvirtuallyeliminatespacketdropseveninthemostcongestednetworkscenarios.
Anadvancedtrafficschedulerfairlyallocatesbandwidthbetweenallvirtualoutputqueueswhileaccuratelyfollowingqueuedisciplinesincludingweightedfairqueuing,fixedpriorityorhybridschemes.
Asaresult,theArista7280R3,7500R3and7800R3Seriescanhandlethemostdemandingdatacenterrequirementswithease,includingmixedtrafficloadsofreal-time,multicast,andstoragetrafficwhilestilldeliveringlowlatency.
TheadvantagesoftheVoQarchitecturearethattrafficisnotforwardedtoadestinationwithoutacredit,andthatthecellbasedfabricusesallpathstotheegresspacketprocessortoavoidcreatinghot-spots.
Thecellbasedfabricleveragesavariablecellsizeandhandlesmixedinterfacespeedswithnoimpactonsystemperformance.
Figure3:CellBasedFabricandIngressVoQArchitectureTable1:RealInvestmentProtectionCharacteristicWhyitMattersH/WInvestmentProtectionCompleteinteroperability3rd/4thgenerationExistinglinecards,fabricmodules,chassis&interfacesworkas-isTrueHardwareInvestmentProtectionSignificantCapExsavingsNoforkliftupgradeCommonArchitectureDeepbufferIngressVoQCellbasedFabric100%efficientHandleunpredictableworkloadsNohotspotsOneOSSingleOSacrossentireportfolioReducesOpExExistingtools&processesworkas-isProvenPlatformFeature-richdayoneHighqualityondayoneLeverage1000sofSWdevelopmentyearsFasterqualificationEnhancementsfortheR3-Seriesincludemulticastexpansionintheingress,fabricoregress,toreducedropsorqueueing.
Intheeventofadrop,itcanbemirroredtoadestinationforanalysis.
DeeppacketbufferswithHBM2TheR3-SeriesisconsistentwithpreviousgenerationsoftheR-Serieswithflexiblepacketbufferscombiningdedicatedon-chipresourceswithhighbandwidthaccessto8GBofHBM2memoryperpacketprocessor.
Thebufferaccessspeedhasincreasedatafactoroffiveoverthepreviousgeneration,usingadvancedmemorytechnologycommonlyfoundingraphicsandAIsystems,alignedtoa5Xincreaseinthepacketprocessorperformance.
HighBandwidthMemory-2,orHBM2,whenintegratedtothepacketprocessorpackage,enablesbothhighbandwidthandgreatercapacity,requiring43%lesspowerthantheequivalentGDDRmemory.
IntegratedHBM2memoryallowstheR3-Seriestodeliverahighnumberofinterfaces,increasessystemreliability,andrequiressubstantiallylesspowerthancomparablehighspeedmemoryoptionssuchasHMC,whichlackthepackageintegrationbenefits.
HBM2isavailablefrommultiplesources,isbackedbytheJEDECconsortium(1),incommonuseongraphicsprocessorsandhasatechnologyroadmaptohigherbandwidthandperformance.
The32MBofon-chipbuffersareusedfornon-congestedforwardingwithseamlessexpansiontotheHBM2basedoninstantaneousorsustainedcongestionwithnopacketdrops.
BuffersareassignedperVoQandclassofservice,withnorequirementtotuneforoptimumbehavior.
MemorymanagementisasimportantascapacityandintheR3-Seriesthepacketbuffermemoryisoptimizedformodernnetworks,thatarenaturallybursty.
Avoidingwastefromsmallframes,memoryisallocatedin4Kbytesegmentstoaccommodatemultipleframes,whicharequeueddirectlyfrommemorytothedestinationpacketprocessor,andarenotreturnedviatheOCB.
PowerEfficient100Gand400GEthernetTheR3-Seriesintroducessupportforhighdensity100Gand400GEthernetinavarietyofplatformsfrom24portsof400Gin1Utoamodularsystemwith576ports,andincreaseperformanceby3Xoverthepreviousgeneration.
Figure4:HBM2andPacketProcessorPackagingFigure5:SeamlesspacketbufferoptimizationwithOCBandHMB2Asingleportof400Gcansupport1x400G,2x200Gor4x100Gmodeswithupto36portsinasinglelinecard,equivalentto144portsof100G.
Whiledemandfor400GisdrivenbythelargestscalenetworkstheR3-Series100Gsystemsprovidehigherbandwidthat35%lowerpowerpergigabit,enablingtherapidadoptionofnextgenerationsystems.
Tobridgethemigrationfrom100Gto400GtheR3-Series400Gand100Gsystemsprovideflexibleportspeedoptionsandmediatypeswithbreakoutcablesandparalleloptics.
FlexRouteImprovementsInternetRouteScaleAllR3-Seriesproductssupportfullinternetroutescalewithacapacityof1.
3MroutesleveragingacommonsetofforwardingtableresourcesfortheL2andL3tables.
TheR3K-Serieswithexpandedsizetablescansupportupto2.
5MIPv4andIPv6routes,allowingformultipleoverlappingfulltablesorformanyyearsofgrowthoftheInternet.
Routesareheldonthepacketprocessor,withouttheneedforexternalTCAMsoradditionalmemory,affectingperformance,powerefficiencyoroverallsystemdensity.
GeoffHuston,ChiefScientistatAPNIC,theAsiaPacificRegionalInternetRegistryhasbeenprovidingresearch,analysisandcommentaryontheglobalinternetroutingtableforoveradecade.
Thepublishedprojectionforthenext5yearsisshownbelow.
AsIPv6addressestakemorespacethanasingleIPv4it'slikelythatcapacityfor1.
3Mrouteswillberequiredtoholdafulltable,inthenearfuture,andthat2.
5Misrequiredforprojectedgrowthbeyond2024.
Source:https://labs.
apnic.
net/p=1195Figure6:ImprovedpowerperbandwidthTable2:HistoricgrowthofIPv4andIPv6announcementsMetricJan2016(Actual)Jan2017(Actual)Jan2018(Actual)Jan2019(Actual)Jan2020(Prediction)Jan2021(Prediction)Jan2022(Prediction)Jan2023(Prediction)Jan2024(Prediction)IPv4Prefixes587,000646,000699,000755,000810,000864,000919,000974,0001,028,000(%Increase)9%8%7%7%6%6%6%5%IPv6Prefixes(L)27,00037,00045,00062,00075,00089,000102,000116,000130,000(%Increase)27%18%27%17%16%13%12%11%IPv6Prefixes(E)27,00037,00045,00062,00083,000109,000145,000192,000255,000(%Increase)27%18%27%25%24%25%24%25%Total(linearIPv6)614,000683,000744,000817,000885,000953,0001,021,0001,090,0001,158,000(%Increase)6%6%6%6%6%6%6%6%Total(exponentialIPv6)614,000683,000744,000817,000893,000973,0001,064,0001,166,0001,283,000(%Increase)10%8%9%9%8%9%9%9%NextGenerationEdgewithEVPNandSegmentRoutingTheR3-SeriesexpandsonSegmentRoutingandEVPNsupportwithmoreflexibleoptionsforunderlayandoverlaytopologies.
Theysupportexpandedlabeldepth,newtunneltypesincludingv6GREandVXLAN-v6andimprovedloadbalancingondeeptunneledpackets.
Asmultipletechnologytransitionsevolveatthenetworkedgee.
g.
multicloud,workloadmovementbetweenprivateandpubliccloud,contentcachesnearcustomerproximityanddistributedNFVservicesattheedge,connectivityandsegmentationarekeytoagileservicedelivery.
TheR3-Seriesprovidestheflexibilitytodelivercostoptimizedandhighdensityinterconnectsolutions,toaccelerateNFVedgeserviceswithEVPN,andSegmentRoutingsolutionsfortheWAN(2).
ProgrammabilityProgrammableProcessingwithElasticPipelineTheR3-Seriesdeliversadvancedprogrammablepacketprocessingwithanewelasticpipeline.
Complexfeaturesrequiringadditionallookupcyclesareimplementedthroughapoolofstagesinthepipeline.
Existingadvancedfeatures,includingAcceleratedsFlow,areimplementedintheprogrammablepipelineavoidingexternaloffloadengines,andincreasingflexibility.
FlexiblePacketProcessorTablesInlargescalenetworksthetotalscalabilityisboundbyoneormoreresources:Routes,Hosts,MACaddressesorMPLSLabels.
Intheseenvironmentstheabilitytoincreasethecapacitybyflexiblyreallocatingtablesallowsformoreefficientdesigns.
TheR3-Seriesleverageacommoncentraldatabaseofforwardingandlookupresources,availabletoallingressandegressstagesforthecommonforwardingentries.
Theseresourcesareallocatedusingforwardingprofilesthatensuretheoptimalallocationtodifferenttables,forawiderangeofuse-cases.
TheL3optimizedprofileexpandstheroutingandnext-hoptablestoaddressnetworkswherelargerroutetablecapacityisrequired,whiletheBalancedprofileallocatestheresourcesacrossalltablesandissuitedforleafandspinedatacenterapplications.
TheR3K-Seriessystemsandlinecardsincludesupportfordoublethecapacityofforwardingtablesforenvironmentsthatrequireresourcestobeexpandedfurther.
TheR3Kpacketprocessorshave2xlargerintegratedforwardingtables,andtheprofilesoptimizeforPeering,DCIandIP/MPLSapplicationswithupto2.
5Mroutesor2.
8MMPLSLabels.
Figure7:NextGenerationTelcoEdgewithEVPNandSegmentRoutingFigure8:R3-SeriesPacketProcessorFlexibleTablesAdvancedNetworkTelemetryAcceleratedsFlowwith1:100at400GTheR-SeriessupportforAcceleratedsFlowenabledsupportforhighratesamplingacrossasystemwithdedicatedsFlowengines.
TheR3-SeriesexpandsAcceleratedsFlowtobesupportedonallsystems,witheachpacketprocessorleveragingtheprogrammablepipelineforhighsamplingratesat400Gand100Gonallports,withtheadditionalmetricsofAS-PathandNext-Hop.
Telemetryinformationontrafficflowsisvaluablewhendeterminingthesourcesofrogueandmisbehavingapplicationswithinthenetwork,togetherwithflowanalysisandtrafficengineeringofpaths.
In-bandNetworkTelemetryforflowandpacketforensicsIn-bandnetworktelemetry,orINT,isastandardsapproachtoprovidingdeepvisibilityintotrafficinreal-time,withnoimpactonswitchperformance.
INTisavailableontheR3-Seriesandprovidesper-flowmonitoringofdrops,latency,congestionandcanreconstructthenetworktopologyandpaths.
INTinformationcanbeexportedinIPFIXorsFlowformatstoamanagementsystemorcollectorsuchasAristaCloudVision,forpredictiveanalyticsanddeepforensics.
Figure9:R3K-SeriesPacketProcessorFlexibleTablesFigure10:AcceleratedsFlowwithstatestreamingFigure11:InbandNetworkTelemetryinActionCopyright2019AristaNetworks,Inc.
Allrightsreserved.
CloudVision,andEOSareregisteredtrademarksandAristaNetworksisatrademarkofAristaNetworks,Inc.
Allothercompanynamesaretrademarksoftheirrespectiveholders.
Informationinthisdocumentissubjecttochangewithoutnotice.
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AristaNetworks,Inc.
assumesnoresponsibilityforanyerrorsthatmayappearinthisdocument.
April6,201902-0082-02AlgorithmicACLsTheR3-seriesprovidesupportforalgorithmicACLsonallsystemsthatincreaseboththescaleandflexibilityleveragingtheprogrammablepipeline.
Withsupportforover100KrulestheR3-SeriesaresuitedforinternetedgeandcybersecurityroleswithstatefulACLsandrichcountersidentifyingandfilteringwithnolossinperformance.
SummaryTheAristaR3-Seriesexpandstheindustryleadingspineandleafsystems,preservinginvestmentwithaconsistentarchitecture,EOSfeaturesandtheintroductionofsupportfor400Galongwithnewinnovationsforprogrammability,telemetry,routingandsecurity.
(1)https://www.
jedec.
org/standards-documents/docs/jesd235a(2)EANTCTestreportsvalidatingEVPNandSegmentRoutingfeatures(3)APNIChttps://labs.
apnic.
net/p=1195Figure12:AlgorithmicACLscombinesoftwareandhardwareinnovation