samplingwww.22zizi.com

bq77910Awww.
ti.
comSLUSAV6–FEBRUARY2012Multi-CellLithium-Ion/PolymerPrecisionProtectorCheckforSamples:bq77910A1FEATURESAutomaticcellbalancingisprovidedusinginternal4-,5-,6-,7-,8-,9-,or10-SeriesCellProtection50-mAcellcircuits.
ArobustbalancingalgorithmIndividualCell-VoltageMonitoringensuresoptimumperformancebymaintainingallcellLow-SideNMOSFETDriveforChargeandvoltagesinbalance.
BalancingmaybeconfiguredtoDischargeControloperateatalltimes,onlyduringcharge,orcanbedisabledcompletely.
CompatibleWith1-mΩCurrent-SenseResistorSupply-VoltageRangeFrom5.
6Vto50VAdditionaladvancedsafetyfeaturesofthebq77910Aincludetheabilitytocontrolsplitpower-pathIntegrated3.
3-VMicro-PowerLDORegulatorMOSFETs,anopen-cellsense-linedetectionLowSupplyCurrentmechanism,andtheabilitytodetectanopenor–NormalMode:50A,Typicalshortedexternaltemperaturesensorfaultcondition.
–ShutdownMode,LDOOFF:3A,TypicalProgrammableProtectionFunctions38-PinTSSOPPackageWiderangeofprogrammabledetectionthresholdsInternal50-mAAutomaticCellBalancinganddelaytimesConfigurableformultiplecelltypesandapplicationAPPLICATIONSrequirements:–CellovervoltageCordlessPowerTools–CellundervoltageCordlessLawnEquipment–PackdischargeovercurrentElectricBikes–PackdischargeshortcircuitUPS–Packchargeshort-circuitcurrentMedicalEquipmentVariablegain(*1or*5)current-sensecircuitLightElectricVehicles(LEV)–Compatiblewithawiderangeofcurrent-senseresistors(1mΩto5mΩtypical)sizedforDESCRIPTIONapplicationrequirementsThebq77910AisabatteryprotectionandcellFixedHardwareProtectionFunctionsbalancingdeviceintendedforLi-ionandLi-PolymerPresetovertemperatureprotectionsbatterypacks.
Open-celldetectionThebq77910Amonitors4-to10-seriesindividualcellOpenandshortedthermistordetectionvoltagesandprovidesfast-actingoutputswhichmaybeusedtodriveN-channelMOSFETstointerrupttheBrownoutprotectionquicklyshutsoffFETsunderpowerpath.
Activationdelaysandrecoverymethodslow-batteryconditionstominimizetheriskofFETforsafetyconditionsarefullyprogrammableinoverheatingnon-volatilememory.
WARNINGThebq77908/bq77908A-seriesandbq77910/bq77910A-seriesintegratedcircuitshelpsystemdesignersgreatlyenhancethesafetyoftheirLi-IonandLi-Polymerbatterypackswhenintegratedeffectivelyandinaccordancewiththeinstructionsdetailedinthisdocumentbytechnicallyqualifiedpersonnelfamiliarwithbatterypackapplicationsafety.
Thisdatasheetmustbereadinfullbeforeworkingwiththebq77910A.
1Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
PRODUCTIONDATAinformationiscurrentasofpublicationdate.
Copyright2012,TexasInstrumentsIncorporatedProductsconformtospecificationsperthetermsoftheTexasInstrumentsstandardwarranty.
Productionprocessingdoesnotnecessarilyincludetestingofallparameters.
bq77910ASLUSAV6–FEBRUARY2012www.
ti.
comPINDETAILSPINFUNCTIONS(38-PinPackage)PINDESCRIPTIONNAMENO.
BAT31Powersupplyvoltage,tiedtohighestcell(+)CCAP20EnergystoragecapacitorforchargeFETdriveCHG21ChargeFET(n-channel)gatedriveCHGST14Charger-statusinput,usedtodetectchargerconnection/wakeupCPCKN19Pack–chargernegativeterminal(chargerreturn)DCAP16EnergystoragecapacitorfordischargeFETdriveDPCKN18Pack–dischargenegativeterminal(loadreturn)DSG17DischargeFET(n-channel)gatedriveEEPROM28EEPROMprogrammingvoltageinput.
ConnecttoVSSfornormaloperation.
GND23,24,25Logicground(notforpowerreturnoranalogreference).
TietoVSS.
NC2,4,30,35,37Noconnect(DONOTCONNECT)externally.
FailuretoleaveNCpinsopencancausefaultyoperation.
SCLK27Serial-communicationclockinputusedforEEPROMprogrammingSDATA26Serial-communicationdatainput/outputusedforEEPROMprogramming(open-drain)SENSE(+)10Current-senseinputSENSE(–)9Current-senseinputTS13TemperaturesensinginputVC132Sense-voltageinputterminalformost-positivecellVC233Sense-voltageinputterminalforsecond-most-positivecellVC334Sense-voltageinputterminalforthird-most-positivecellVC436Sense-voltageinputterminalforfourth-most-positivecellVC538Sense-voltageinputterminalforfifth-most-positivecellVC61Sense-voltageinputterminalforsixth-most-positivecellVC73Sense-voltageinputterminalforseventh-most-positivecellVC85Sense-voltageinputterminalforeighth-most-positivecellVC96Sense-voltageinputterminalforninth-most-positivecellVC107Sense-voltageinputterminalfortenthmost-positive(most-negative)cellVC118Most-negativecell(–)terminal(BAT–)VREG12Integrated3.
3-VregulatoroutputVSS129Analogground(substratereference)VSS211Analogground(substratereference)VTSB15Thermistorbiassupply(sourcedfromVREG)ZeroDelaytestmodepin.
EnablesserialcommunicationsinterfaceandminimizesprotectiondelaytimesZEDE22whenconnectedtologichigh.
ConnecttoVSSfornormaloperation.
Astrongconnectionisrecommended.
2SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012PINDIAGRAM–bq77910A–38-PinSSOPDBTPACKAGECopyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback3ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comFUNCTIONALBLOCKDIAGRAMORDERINGINFORMATIONPARTNUMBERPACKAGETYPEPACKAGINGbq77910ADBTTSSOP50-piecetubebq77910ADBTRTSSOP2000-piecereel4SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012ELECTRICALSPECIFICATIONSABSOLUTEMAXIMUMRATINGS(1)overoperatingfree-airtemperaturerange(unlessotherwisenoted)VALUE/UNIT–0.
3to(5*N)V,N=numberofcellsDCsupply-voltagerange,VMAXBATimplementedinpackDPCKN–0.
3Vto50VCPCKN(BAT–50)Vto(BAT+0.
9)VCell-to-celldifferential,VCxtoVC(x+1),x=1to10–0.
3Vto9VSENSE(+)–3Vto3VSENSE(–)–0.
3Vto50VInputvoltagerange,VINSCLK,SDATA,ZEDE(2)–0.
3Vto7VTS,CHGST(3)–0.
3VtoBATVEEPROM–0.
3Vto15VCellinputVCx,x=1–10(11–x)*5VCellinputVC11–3Vto3VCHGreferencedtoCPCKN,CCAPreferencedtoCPCKN–0.
3Vto15VOutputvoltagerange,VODSGreferencedtoVSS,DCAPreferencedtoVSS–0.
3Vto15VVTSB(2)–0.
3Vto5VCurrentforcellbalancing,ICB70mARegulatorcurrent,IREG45mAStoragetemperaturerange,Tstg–65°Cto150°C(1)StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedeviceandexposethesystemtopotentialsafetyrisks,resultingfromthedamagetotheIC.
Thesearestressratingsonly.
FunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperatingConditionsisnotimplied.
Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliabilityorcausedamagetothedevice.
(2)Allsignal/logicpinswhichmaybeconnectedtothepackexternalterminalsareinternallyclampedtoamaximumvoltageof5V.
Iftheexternalsourcedrivingthesesignalsexceedstheclampthreshold,seriesresistancefromthepintothepackterminalisrequiredtoavoidoverstressontheclampingcircuit.
(3)CHGSTandTSpinsaretolerantofappliedovervoltageasnotedtoallowforchargersingle-faulttolerance.
Normaloperatingrangeistypically3.
3Vorlessatthispin;thus,highvoltageseenheremaycorrespondtoafaultcondition.
THERMALINFORMATIONbq77910ATHERMALMETRIC(1)DBTUNIT38PINSθJAJunction-to-ambientthermalresistance,non-LDO(2)71.
7°C/WθJA2Junction-to-ambientthermalresistance,LDO(2)(3)115.
8°C/WθJCtopJunction-to-case(top)thermalresistance(4)18.
5°C/WθJBJunction-to-boardthermalresistance(5)33.
9°C/WψJTJunction-to-topcharacterizationparameter,non-LDO(6)1°C/WψJT2Junction-to-topcharacterizationparameter,LDO(6)(3)38.
9°C/W(1)Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953.
(2)Thejunction-to-ambientthermalresistanceundernaturalconvectionisobtainedinasimulationonaJEDEC-standard,high-Kboard,asspecifiedinJESD51-7,inanenvironmentdescribedinJESD51-2a.
(3)ThesemetricsshouldbeusedonlyforcalculatingjunctiontemperatureduetopowerdissipationresultingfromtheIOUTloadonVREG.
JunctiontemperaturecalculationsforallothersourcesofpowerdissipationshouldusethestandardvaluesθJAandψJT.
(4)Thejunction-to-case(top)thermalresistanceisobtainedbysimulatingacoldplatetestonthepackagetop.
NospecificJEDEC-standardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88.
(5)Thejunction-to-boardthermalresistanceisobtainedbysimulatinginanenvironmentwitharingcoldplatefixturetocontrolthePCBtemperature,asdescribedinJESD51-8.
(6)Thejunction-to-topcharacterizationparameter,ψJT,estimatesthejunctiontemperatureofadeviceinarealsystemandisextractedfromthesimulationdataforobtainingθJA,usingaproceduredescribedinJESD51-2a(sections6and7).
Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback5ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comTHERMALINFORMATION(continued)bq77910ATHERMALMETRIC(1)DBTUNIT38PINSψJBJunction-to-boardcharacterizationparameter(7)33.
2°C/WθJCbotJunction-to-case(bottom)thermalresistance(8)N/A°C/W(7)Thejunction-to-boardcharacterizationparameter,ψJB,estimatesthejunctiontemperatureofadeviceinarealsystemandisextractedfromthesimulationdataforobtainingθJA,usingaproceduredescribedinJESD51-2a(sections6and7).
(8)Thejunction-to-case(bottom)thermalresistanceisobtainedbysimulatingacoldplatetestontheexposed(power)pad.
NospecificJEDECstandardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88.
RECOMMENDEDOPERATINGCONDITIONSoveroperatingfree-airtemperaturerange(unlessotherwisenoted)MINTYPMAXUNITSupplyvoltageBAT(1)5.
6(2)43.
75(3)VCelldifferential,VCxtoVC(x+1),1.
44.
375V(x=1to10)VIInputvoltagerange(11–x)*CellinputVCx,x=1–104.
375VCellinputVC11–11VIHLogic-levelinput,high0.
8*VREGVSCLK,SDATA,EEPROM,ZEDEVILLogic-levelinput,low0.
2*VREGVVSENSE(+)VSS–1VSS+1VVoltageappliedatSENSE(±)pinsVSENSE(–)–0.
2BATVRecommendedVCxnominalRVCX501001000ΩinputresistanceIREGRegulatorcurrent10mAICBCellbalancingcurrent50mARecommendedVCxnominalCVCX1FinputfiltercapacitanceRCPCKN,Recommendedisolation-pin100ΩRDPCKNinputresistancePulldownforload-removalRLDRM_DET50kΩdetectionCVREGExternal3.
3-VREGcapacitor1FEEPROMnumberofwrites3timesTOPROperatingtemperatureMeetingallspecificationlimits–2585°COperationalbutmaybeoutofspeclimits,TFUNCFunctionaltemperature–40100°CnodamagetopartCCCAP,ExternalcapacitanceonCCAP0.
11FCDCAPandDCAPpins(4)SerialcommunicationinterfaceRPSCLK,SDATA2.
2kΩpullupresistance(1)ThevoltagerateofchangeattheBATpinshouldbelimitedtoamaximumof1Vpersinordertopreventunwanteddeviceshutdown.
(2)Minimumvoltageassumes4-cellconnectionat1.
4V/cell.
(3)Maximumvoltageassumes10-cellconnectionat4.
375V/cell.
(4)CCCAPandCDCAPactaschargereservoirsfortheCHGandDSGpinswhendrivinglargeprotectionFETs.
Minimumvalueisrequiredforstability,independentoftheCHGandDSGloading.
NOTERefertotheOpen-CellDetectionoverviewintheApplicationInformationsectionforadescriptionofRVCXandCVCXsizing.
6SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012ELECTRICALCHARACTERISTICSVcell(n)=1.
4to4.
375forallcells,TA=–25°Cto85C,BAT=5.
6to43.
75V;TypicalvaluesstatedwhereTA=25°CandBAT=36V(unlessotherwisenoted)PARAMETERTESTCONDITIONSMINTYPMAXUNITSUPPLYCURRENTCHG,DSG=on(nodcload),VREG=on,ICCNormal-modeaveragesupplycurrent5075AIREG=0mA,BAT=36VVcellVGATE_UVdcloadVO(FETOFFDSG)=V(DSG)–VGND0.
2GatedrivevoltageatDSGandCHGpinsforV(FETOFF)VFETOFF(disabled)conditionsVO(FETOFFCHG)=V(VHG)–Vpack–0.
2VDSG:10%to90%90140CL=50nF,BAT=43.
75VVCHG:10%to90%90140trRisetime,measuredatICpin(CHGorDSG)sVDSG:10%to90%90140CL=50nF,BAT=6.
4VVCHG:10%to90%90140VDSG:90%to10%1020CL=50nF,BAT=43.
75VVCHG:90%to10%2040tfFalltime,measuredatICpin(CHGorDSG)sVDSG:90%to10%50100CL=50nF,BAT=6.
4VVCHG:90%to10%50100VREG,INTEGRATED3.
3-VLDOIOUT=10mA(maximumdcload)(5)3.
13.
33.
55VOutput-voltageregulationunderallline,load,VREGtemperatureconditionsIOUT=0.
2mA3.
13.
33.
55VISCShort-circuitcurrentlimitVREG=0V,forcedexternalshort(thermallyprotected)(6)2045mA(1)Forpredictableshutdowncurrent,thevoltageatCPCKNwithrespecttoVSSmustbecontrolled.
IntheparallelFETcase,CPCKNisclampedthroughthebodydiodeofthechargeFET.
IntheseriesFETcase,externalcircuitryisrequiredtokeepCPCKNfromfloating.
ContactTIforrecommendedapplicationcircuits.
(2)Atthisvoltage,theLDOhassufficientvoltagetomaintainregulation.
ThePORthenenablesthecharger-detectlogic.
LogicisheldinresetuntilinsertedintochargerandLDOhasreachedVPOR.
Thepartstilloperatesbelow7Vtothespeclimitof5.
6V.
(3)VPORandVREGarederivedfromthesameinternalreference,sothattheMAXvalueofVPORandtheMINvalueofVREGdonotoccuratthesametime.
(4)FETdriveisdisabledifvoltageatCCAPorDCAPpinsVov50150ITS_PDTSpinthermistorcheckpulldowncurrentTS=3.
3V(externallydriven)124AtTHERM_CHECKThermistorfaultsamplinginterval4sThermistorexternal-biassupply-detectionVEXT_BIAS_DETInternalVTSBsupplyoff131517%VREGthresholdOvertemperature-detectionthresholdVHOTInternalVTSBsupplyon,noexternalbias1721%VREG(ratiometrictoVTSB)Thermistorshort-detectiontripthresholdVTH_SHORTInternalVTSBsupplyon,noexternalbias110%VREG(ratiometrictoVTSB)Hysteresisforshort,open,andovertemperatureVTH_HYSTTScomparatorhysteresis38%VREGcomparatorsThermistoropendetection(ratiometrictoVTH_OPENInternalVTSBsupplyon,noexternalbias9098%VREGVTSB)CELLBALANCEVCELL=CBVMAX=3.
9–50%1050%rDS(on)forinternalFETRBALCell-balanceinternalresistance(7)VCELL=CBVMAX=3.
2–50%2050%Ωswitch,TA=0°Cto50°CVCELL=CBVMAX=2.
5–50%3050%tCELL_BAL_CHECKCellbalancingupdateinterval7.
5minOPEN-CELLCONNECTIONILOAD_OPEN_CELL(8)Cellloadingduringopen-celldetect75450AOpen-cellfault-samplingintervaltOPEN_CELL_CHECK4*Ns(N=totalnumberofcellsinpack)MinimumimpedancefromcellterminaltoVCxROPEN_CELL100kΩinputthatisinterpretedasanopenconditionBATTERY-PROTECTION-THRESHOLDTOLERANCES(9)TA=0°Cto50°C–2525OVdetectionthresholdaccuracyforVOV=4.
2V(10)TA=–25°Cto85°C–5050ΔVOVmVTA=0°Cto50°C–5050OVdetectionthresholdaccuracyforVOV=3.
2V(10)TA=–25°Cto85°C–7575ΔVUVUVdetectionthresholdaccuracyTA=–25°Cto85°C–100100mVΔVSCDOCC/SCDdetectionthresholdaccuracyTA=–25°Cto85°C–20%20%ΔVOCDVSCCfrom10mVto15mV–33mVΔVSCCSCCdetectionthresholdaccuracyVSCC>15mV–20%20%BATTERYPROTECTIONDELAY-TIMETOLERANCES(9)ΔtOVOVdetectiondelaytimeaccuracy–15%15%DefaultEEPROMsettingΔtUVUVdetectiondelaytimeaccuracy–15%15%ΔtSCDOCD/SCDdetectiondelaytimeaccuracy–15%15%tSCDMaxΔtSCCSCDdetectiondelaytimeaccuracy–15%15%(7)Balancecurrentisnotinternallylimited.
Externalseriesresistancemustbeusedtoensurebalancecurrentisbelow50mAmaximumtolimitICinternalpowerdissipation.
(8)Thiscurrentissufficienttodetectanopen-cellconditiondownto100kΩacrossthecellfromcircuitryoutsideofthebq77910A.
Theaveragecurrentfromthisloadingislessthan1Afora10-cellconfiguration.
ApplicationNote:Whenusingthispartwithotherdevicesthatconnecttothebatterycells,caremustbetakentoavoidexcessiveparallelcapacitancesonthecellinputpins.
(9)NominalvaluesaresetbyEEPROMprogramming;seeEEPROMtableforpossiblevalues.
(10)Standardproductionpartsarecalibratedat4.
2V.
AnadditionalOVthresholdaccuracyshiftof25mVpervoltofOVsetpointispossible.
ContactTIforcalibrationoptionsatsetpointvoltagesotherthan4.
2V.
8SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012ELECTRICALCHARACTERISTICS(continued)Vcell(n)=1.
4to4.
375forallcells,TA=–25°Cto85C,BAT=5.
6to43.
75V;TypicalvaluesstatedwhereTA=25°CandBAT=36V(unlessotherwisenoted)PARAMETERTESTCONDITIONSMINTYPMAXUNITCHARGERDETECTION(11)VoltageatCHGSTpin,referencedtoVSS,todeterminechargerpresent(chargerinsertionVCHG_DET15.
6VVCHG_DET1)LOADREMOVALDETECTIONVoltageatDPCKN,referencedtoVSS,withDSGFETdisabledtodetectloadremovalVOPEN_LOAD5.
6VUV+hystveryquickly,re-enablingtheFETsandallowingthehighloadcurrenttopersist.
CareshouldbetakenwhenusingthisUV_REC=0mode,asthepowerMOSFETscouldoscillaterapidly.
WARNINGTominimizeapplicationsafetyrisk,careshouldbetakentoproperlysetovercurrentandcellundervoltagetripthresholds,becauseitispossiblethatafullychargedpackwithacontinuoushighdischargeloadcanoscillateinandoutoftheundervoltagecondition.
ThismayresultinoverheatingofthecellsorprotectionMOSFETsduetothepotentiallyhigh-duty-cycleoperation.
IfUV_REC=1,theDSGFETisre-enabledwhenallthecellvoltagesincreasebackabovetheVUVthresholdlevelplusthehysteresisvalueANDtheloadisremoved.
CurrentisinterruptedbyopeningtheFETs,andatthispointthecellvoltagesmayquicklyrecoverabovetheUV+hystlevelsifthebatterypackisnotcompletelydepleted.
However,theexternalloadmayremainattached.
Whentheexternalloadisremoved,theICdetectsloadremovalandreconnectstheDSGFET.
Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback11ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comIfUV_REC_DLY=1andanycellremainsbelowtheVUVthresholdlevelplusthehysteresisforlongerthan8seconds,thedeviceentersSHUTDOWNmode.
IfUV_REC_DLY=0,thedevicedoesnotentertheSHUTDOWNmodefromthecellundervoltagefaultcondition.
TheLDOisturnedoffduringtheSHUTDOWNmode.
InsertionintoachargerisrequiredtorecoverfromtheSHUTDOWNmode.
Chargerdetectionmethodsarediscussedinlatersections,suchasApplicationInformation.
OvercurrentinDischarge(OCD)DetectionTheOCDdetectionfeaturesensesanoverloadcurrentbymeasuringthevoltageacrossthesenseresistor.
Whenanoverloadconditionisdetected,bothofthepowerFETSaredisabledtopreventdamagetothecellsandFETcomponents.
CriteriaforfaultrecoverydependonthestateoftheSOR(EEPROMbit).
Overcurrenttriplevel(VOCD)andblankingtimedelay(tOCD)areprogrammableviaEEPROMbitsOCDTandOCDDtomatchindividualapplicationrequirements.
ShortCircuitinDischarge(SCD)DetectionTheSCDdetectionfunctionsensesseveredischargecurrentbymeasuringthevoltageacrossthesenseresistor.
Whenashortcircuitisdetected,bothofthepowerFETsaredisabledtopreventdamagetothecellsandFETcomponents.
CriteriaforfaultrecoverydependonthestateoftheoftheSOR(EEPROMbit).
Short-circuittriplevel(VSCD)andblankingtimedelay(tSCD)areprogrammableviaEEPROMbitsSCDTandSCDDtomatchindividualapplicationrequirements.
LoadRemovalDetection/OCDandSCDFaultRecoveryThepartincludesaninternalhigh-impedanceconnectionbetweentheDPCKNandVSSpinsofapproximately1.
5MΩ.
Anexternalload(forexamplepowertoolmotorwinding),ifstillconnectedtothepackterminals,wouldpresentaverylowimpedancerelativetothehighinternalpulldownresistance.
NOTEIftheexternalloadpresentsadditionalcapacitance,thenanexternalpulldownmayberequiredbetweentheDPCKNandVSSpins.
Thisextrapulldowndoesnotincreasebatteryloadcurrentwhentheexternalloadisremoved.
IftheDSGpowerFETisdisabledafteranoverloadorshort-circuitevent,thevoltageattheDPCKNisapproximatelyequivalenttotheBATvoltagepotentialwhileanexternalload(e.
g.
,powertoolmotor)ispresentatthepackterminals.
Whentheexternalloadisremoved,thehigh-valueinternalresistancepullsdowntheDPCKNpotentialtotheinternalVSSlevel.
AninternalcomparatormonitorstheDPCKNterminalvoltageduringtheprotectionstate.
WhentheDPCKNvoltagefallsto3Wisrecommended.
BATVoltageRateofChangeInadditiontoprovidingtheholdupfunction,thefiltercomponentsattheBATpinservetolimitthemaximumvoltagerateofchange.
ThevoltagerateofchangeattheBATpinshouldbelimitedtoamaximumof1Vpersinordertopreventunwanteddeviceshutdown.
Figure2.
Example5-Cell,SeriesFETConfigurationSchematicUsingbq77910ACopyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback15ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comWaveformsillustrativeofloadtransientsduringhighpackvoltageconditionsareshownhere.
Figure3.
High-VoltageLoad-TransientWaveformsFETGateDriveControlAsnotedintheprevioussection,theBATvoltageattheICpinisheldupslightlylongerthantheexternalPACK(+)voltageusingtheexternaldiode/capacitortofeedtheBATrail.
Thus,iftheBATpinvoltageattheICsags,theexternalvoltagesagwillhaveexceededtheholduptime,andtheICisnolongerabletooperateforanextendedperiodoftime.
Atthispoint,theDSGandCHGgatedriveoutputsareactivelydrivenlow.
TheFETdriverstagesusetwoadditionalexternalcapacitors(connectedattheCCAPandDCAPpins)tomaintainalocalpowerreservoirdedicatedtothegatedrivecircuitry,asthesystem(BAT)voltagemaybecollapsingduringthetimethattheFETsarebeingturnedoff.
TheFETsareturnedoffwhenthevoltageattheCCAPand/orDCAPpinsfallsbelowVGATE_UV.
ByturningofftheFETsquickly,thesystemavoidstheconditionofinsufficientgatedriveduetolowbatteryvoltage.
NOTEIftheFETgatedriveisnothighenough,thepowercomponentsmaynotbeintheirlinearoperatingregion,andcouldoverheatduetoresistivelossesathighloadcurrents.
16SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012Inthecaseofasystemundervoltagecondition,bothFETsaredisabledwithin500smaximum;inallcasestheFETfalltimeislessthanfalltimespecifiedintheElectricalCharacteristicssection(FETDrive).
Duringinitialpowerup,oncetheUVLOthresholdhasbeenreachedandtheICpowersupfully,therisetimeoftheFETgatedrivesignalisalsoVOVtOVOFFONAllcellsUV+hyst(4)UVFAULTprotectionOFF(1)(2)OFFUV_RECbit=0state(3)2)CHGFETenabledimmediatelyifchargerdetectedCELLUNDER-AnycellUV+hystANDloadremovedUVFAULTprotectionOFF(5)(2)OFFUV_RECbit=1state(3)2)CHGFETenabledimmediatelyifchargerdetectedOFFOFFTMP_RECbit=0VTS>VHOT+hysteresis(6)PacktemperatureoutPACKOVER-ofrange,(1-2)*tTHERM_CHECKOTFAULTprotectionstateVTS>VHOT+hysteresis(6)andloadTEMPERATUREOFFOFFTMP_RECbit=1VTSVOCDtOCDOFFOFFBothONwhenloadremovedANDINDISCHARGEstateSORbit=1chargerdetectedSORbit=0BothONwhenloadremovedSHORTCIRCUITSCDFAULTprotection(VSC–VSS)>VSCDtSCDOFFOFFBothONwhenloadremovedANDINDISCHARGEstateSORbit=1chargerdetectedSHORTCIRCUITSCDFAULTprotection(VSS–VSC)>VSCCtSCCOFFOFFN/AChargerremovedINCHARGEstateOPENOPENVTS>VTH_OPEN(1to2)*tTHERM_CHECKOFFOFFTHERM/UNDERTEMPN/AVTSVTH_SHORTVTSROPEN_CELLtOPEN_CELL_CHECKstate)conditionabsent>filtertime(9)(1)TheLDOisturnedoffintheSHUTDOWNmode.
WhentheLDOisdisabled,theCHGFETdriveoutputisOFFbydefault,asalloutputsofthedevicearedisabled.
(2)RegardlessofEEPROMsetting,ifabatterypackintheUVprotectionstateisinsertedintoacharger(chargerpresenceisdetected),theCHGFETisturnedONtoallowrechargeofthepack.
TheDSGFETisturnedonafterUVrecovery,asnotedinTable2(conditionsbasedonEEPROMsetting).
(3)a)IfUV_REC_DLY=1andanycellremainsVuv+hysteresis).
(6)RecoveryoccurswithintTHERM_CHECKafterrecoveryconditionsaremet.
(7)Ifathermistorshortoccurswhilechargerisnotdetected,theFETsinitiallyarere-enabledwhenchargerisdetected.
IfshortconditionisstillpresenttTHERM_CHECKafterchargerdetectionandCHG_TMP_DIS=0,theFETsre-openuntiltheshortconditionisremoved.
IfCHG_TMP_DIS=1,theFETsremainenabledregardlessoftheshortcondition.
(8)Ifachargerispresentlydetectedwhentheshortedthermistorfaultisregistered,theLDOdoesnotshutoff.
Within0to4secondsaftertheshortisremoved,theFETsre-enableandthedevicerecovers.
However,ifthechargerisdisconnectedaftertheshortisremoved,butbeforetheFETsarere-enabled,thedevicewillshutdownwiththeLDOoffandrequirechargerdetectionforrecovery.
(9)Ifanopen-cellfaultoccurswhileachargerisdetected,thedevicedoesnotshutdown.
However,thedevicedoesshutdownifthechargerislaterdisconnectedwhiletheopen-cellconditionisstillpresent.
Ifthechargerisdisconnectedaftertheopen-cellconditionisremoved,thedevicerecovers(i.
e.
,FETsarere-enabled).
Followingashutdowncausedbyanopen-cellcondition,theFETsinitiallyre-enablewhenachargerisdetected.
However,iftheopen-cellconditionisstillpresent,theFETsre-openafterthefiltertime.
20SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012CELL-BALANCINGFUNCTIONThebq77910Aimplementsaninternalcell-balancecontrolcircuitandpowerFETstructure.
BecausenoCPUisavailabletomanageacomplexalgorithm,asimpleandrobusthardwarealgorithmisimplemented.
OverviewUsesaseparatecomparatortocheckifcellshavereachedthebalancingthresholdtostartbalancing(i.
e.
,doesnotusetheOVtripcomparator)Balanceandchargecanrunconcurrently–nocharge-timeextensionComparecellvoltages–cellwithhighestvoltageisbledofffortimetCELL_BAL_CHECK.
BalancingcurrentsetbyRVCX–effectofbalancingcurrentoncell-to-cellvoltagedifferentialdependsoncellcapacityandtCELL_BAL_CHECK.
Cell-balancingoptionsprogrammable–balancingthreshold,whentobalance(always,onlyduringcharge,ornever),andhowlongtobalanceControlAlgorithmDescriptionPotentialbalancingactionisupdated(latched)everyminimumdwelltimetCELL_BAL_CHECK1.
Action=bleedhighestcellabovecell-balancestartvoltage[Note:nohysteresis]2.
Onlyonecellisbledatatime3.
Aminimumdwelltimeof7.
5minutesequatestocellbalance-startthreshold).
6.
Suspendbalancingimmediatelyifchargerisdisconnected.
BalancingAlgorithmConfigurableParametersCell-balancestartvoltage:4bits,3.
9V–2.
4Vin0.
1-Vincrements,default=3.
9VCell-balanceenable/control:basedonchargerpresent,timerexpiration,orboth(SeeEEPROMmapfordetails)Time-outvalue(optional):2bits:1,2,4,8hoursCopyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback21ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comExternalConnectionsforCellBalancingMultipleoptionsaresupportedfordifferentcell-balancingrequirements.
Thesearesummarizedinthefollowingsections.
ThesediagramsdoNOTshowtheotherexternalconnectionssuchasBAT,TS,CHGST,orpowerFETarrangements.
Seesubsequentsectionsformorecompleteapplicationdiagramsshowingallexternalconnections.
NormalConfiguration–BalancingWithInternalFETsThebasiccellbalancing-configurationisshownhere.
Balancecurrentmustbelimitedusingexternalresistance.
ResistivecomponentsizeslimitthebalancecurrentasthereturncurrentflowsthroughtheVCxpins.
Becauseresistorvaluesarerelativelylow(toallowsufficientbalancecurrent),itmaybenecessarytomaximizeexternalcapacitorsizes,dependingonthefilteringrequirements.
Figure6.
TypicalBalancingConfiguration(~50mA)Low-CurrentCellBalancing–ExternalFilteringforCell-VoltageReadingsTolimitbalancingcurrentfurther,theexternalseriesresistancecanbeincreasedasshown.
BalancingcanbefullydisabledbysettingEEPROMbitCB_EN=0ifdesired.
22SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012Figure7.
TypicalLow-CurrentBalancingConfiguration(~2mA)High-Current(Approximately100-mAto150-mA)BalancingUsingExternalPowerFETsInthisexample,externalPMOSdevicesaredrivenfromtheICinternalNMOSbalanceFETs.
Currentlimitingiscontrolledbytheexternalresistorsandisontheorderof100mAto150mA,dependingoncellvoltage.
ContactTIforapplicationexample.
Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback23ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comAPPLICATIONINFORMATIONOpen-CellDetectionAspartofthebq77910Aopen-celldetectionfeature,asmallloadcurrentisperiodicallyappliedacrosseachcellinsuccession.
Thisloadresultsinamomentaryvoltagedropthatreducestheapparentcellvoltagemeasuredbythebq77910A.
Thevoltagedropmustbetakenintoconsiderationwhenchoosingthedesiredovervoltage(OV)hysteresisandselectingresistorvaluesforthecellinputfilters.
Amechanicalorassemblyfaultinthepackcancauseahigh-impedanceorbrokenconnectionbetweentheICcellsensepinsandtheactualcells.
Duringoperation,thebq77910Aperiodicallychecksthevalidityoftheindividualcellvoltagereadingbyapplyingatestcurrentacrosseachcell.
Iftheconnectionbetweenthepinandthecellisopentheapparentcellvoltagewillcollapseandafaultconditionisdetected.
Figure8.
Open-CellCheckDetectinganOpen-CellReferringtoFigure8,VCELL,NismeasuredasthedifferencebetweenVCAandVCB.
IfthewireconnectingVCAtothecellisopen,thetestcurrentwilldischargetheinputcapacitor(CIN)andVCAwillcollapsetowardVCBcausingthemeasureddifferencetoapproachzero.
Thetestcurrent(ILOAD_OPEN_CELL)isappliedfor~125ms.
Attheendofthistime,ameasureddifferencebetweenVCAandVCBlessthan1Visconsideredanopen-cellfault.
Open-CellCheckUnderNormalConditionsIftheconnectiontothecellisnotopen,thetestcurrentiseasilysuppliedbythebatterycellandVCAwillnotcollapsetowardVCB.
However,thetestcurrentwillinduceasmallvoltagedropacrosstheinputresistors(RIN)sothatthemeasuredcellvoltagewillbelessthantheactualcellvoltage.
AsshowninFigure9,themeasurementerrorisequalto-(ILOAD_OPEN_CELL*2*RIN).
Forexample,thedatasheetmaximumforILOAD_OPEN_CELL=450A.
IfRIN=50Ω,thenthemeasurementerrorwillbe–(450*10–6)*2*50=-0.
045V=–45mV.
24SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012Figure9.
EffectofOpen-CellCheckonCellVoltageMeasurementEffectofMeasurementErroronOVandUVDetectionThemeasurementerrorinducedbytheopen-cellcheckdoesnotaffecttheovervoltage(OV)andundervoltage(UV)faultdetectionaccuracybecausetheminimumfaultfilteringtime(500ms)isfourtimeslongerthanthetimethetestcurrentisapplied(125ms).
Furthermore,thetestcurrentisappliedtoonlyonecellevery4seconds.
InasystemwithNcells,eachcellhasthetestcurrentappliedonlyonceeveryN*4seconds.
EffectofMeasurementErroronOVRecoveryRecoveryfromanOVfaultoccurswhenthemeasuredcellvoltagedropsbelowtheOVthresholdminustheOVhysteresis.
Recoveryisimmediate;thereisnominimumfilteringtimeforfaultrecovery.
Therefore,anopen-cellcheckthatcausesadropinthemeasuredcellvoltagecancauseaspontaneousOVrecoveryiftheactualcellvoltageminusthedropislessthantheOVthresholdminustheOVhysteresissetting:Itisimportanttonotethatbecausetheopen-cellcheckisperformedononlyonecellatatime,spontaneousrecoveryduetotheopen-cellcheckwillonlyoccurifallothercellsarealsobelowtheOVthresholdbyatleasttheOVhysteresisvoltage.
SelectionofRINandOVHysteresistoAvoidSpontaneousOVRecoveryThevoltagedropacrossRINduringopen-cellcheckingreducestheOVhysteresisbyILOAD_OPEN_CELL*2*RIN.
Re-arrangingtheequationaboverevealstheactualOVrecoveryvoltage:AndtheeffectiveOVhysteresis:Fromtheequationabove,theprogrammedOVhysteresis(VOV_HYST)andRINcanbechosentogivethedesiredeffectiveOVhysteresis(VOV_HYST,EFF).
UsingthedatasheetmaximumforILOAD_OPEN_CELL=450A,examplesoftheseparametersarecalculatedinTable3.
Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback25ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comNOTEAgainitshouldbenotedthatVOV_HYST,EFFappliesonlyduringthe125msduringwhichacellisbeingcheckedforanopencondition,andonlyonecellischeckedevery4sec.
Otherwise,thehysteresisistheprogrammedvalueVOV_HYST.
Therefore,theactualhysteresisobservedinasystemcanbeeitherofthesetwovalues.
Forexample,ifVOV_HYST=200mVandRIN=56Ω,theobservedhysteresiscanbeeither150or200mV(seeTable3).
Additionally,whenselectingtheappropriatevalueforlowerRIN,theupperlimitoncellbalancingof50mApercellmustbeobserved.
Forexample,ifyourcellshaveamaximumof4.
3V,eachRINmustnotfallbelow43Ω,as(4.
3V/(2*43Ω)=50mA.
Ifsuchlowerresistancesaretobeused,thecellbalancingfeaturemustbedisabled.
Table3.
VOV_HYST,EFFforVariousVOV_HYSTandRINSelectionsVOV_HYST(mV)RIN(Ω)VOV_HYST,EFF(mv)0ThisSettingMustOnlyBeUsedWhenNotDirectlyControllingFETswiththeCHG/DSGOutputsandRecoveryDecisionsareMadeByASeparateDevice25504410100832510056501501392515011150150561002001942520016750200111100200561502502502525022250250167100250111150250562003003062530027850300222100300167150300111200InternalVoltageRegulatorThebq77910Ahasanintegratedlow-powerlinearregulatorthatprovidespowertobothinternalandanyoptionaluser-definedexternalcircuitry.
TheinputfortheregulatorisderivedfromtheBATterminals.
VREGnominaloutputvalueis3.
3Vandisalsointernallycurrent-limited.
Theminimumoutputcapacitanceforstableoperationis1F.
Theregulator(andtheICinternalcircuitry)isdisabledduringtheSHUTDOWNmode.
Whentheregulatorcircuitisdisabled(includingthetimeduringthepower-upsequenceoftheIC)theDSGandCHGFETsaredrivenOFF.
ChargerDetectionandWake-UpThebq77910Acontainsamechanismtodetectthepresenceofanexternalchargerandallowthedevicetowakeupfromthelow-powershutdownmodewhentheLDOhasbeenturnedoff.
Alow-powerwake-upcircuitmonitorstheCHGSTpintodeterminethechargerconnectionevent.
26SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012CHGSTPinDetectionBecausethebq77910Aisdesignedtouselow-sideNMOSFETstocontrolcurrentflowto/fromthebatterypack,chargerpresencedetectioncannotbedeterminedsimplybycheckingthepositiveterminalvoltage.
Toallowdetectionofthepresence/absenceofanexternalchargerunderanyoperatingconditions,thebq77910Aimplementsachargersensepin,designatedCHGST.
Ifavoltageofgreaterthan(nominally)0.
5VisdetectedattheCHGSTpin,thebq77910Alogicassumesthatachargerhasbeenconnected.
ThevoltagemonitoringcircuitattheCHGSTpinisanalways-onsubsystemwithinthechip.
WhenthepropervoltageappearsattheCHGSTpin,theICwakesupfromtheSHUTDOWNmodeafterachargerisconnected.
Iffaultconditionsexist,thepartmayre-enteralow-powerorSHUTDOWNstate,dependingontheconfiguration.
ThemeansofconnectingtheCHGSTpinisuser-andapplication-dependent,andmayvarywiththeexternalcontactstructureofthebatterypack.
Forexample,adedicatedCHARGER(+)contactwithattenuatingresistorscanbeusedsuchthattheCHGSTpinispulledhighwheneverthepackisinsertedintoacharger.
Forasystem/applicationwhichusesacharge-protectionFETtodisconnectthecharger(–)duringafaultcondition,itisrecommendedthattheconnectiontotheCHGSTpinbepulleduptothecharger(+)potential(usingapullupresistor)onthechargersidetopreventthissignalfromgoingnegativewithrespecttothepackinternalreference(VSSpin)whenthechargeFETinthebatterypackmaybeopen.
IfthesystemdoesnotuseachargeFETwithinthebatterypack,theVSS(internal)referenceandCPCKN(chargerreference)arethesame,whichallowsCHGSTtobepulleduptoanylogic-highlevelaboveVCHG_DET1todetectchargerinsertion.
AtimingdiagramcorrespondingtotheUVfault/recoveryconditionusingtheCHGSTsignalisshowninFigure10.
CPCKNPinDetectionWhenthedeviceisshutdownwithLDOoff,apotentiallessthanapproximatelyVSS–2VappliedtoCPCKNcausestheLDOtoturnonandthepower-upsequencetocommence.
However,thepower-upstateisnotlatched,andifCPCKNfallsabovetheVSS–2Vthreshold,thedeviceagainshutsdown.
Figure10.
NormalOperation,UVFaultonVCELLx,ThenChargerConnectionCopyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback27ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comTemperatureSensingTSandVTSBPinInterfaceThebq77910AusestheTSpininputtoreadthevoltageonanexternalthermistortodeterminethepack/systemtemperature.
TheVTSBpinallowstheICtogenerateitsownbiasvoltagetodrivethethermistor.
Tosavepower,theVTSBbiassupplyispulsedONonlywhenthetemperaturereadingsarebeingtaken.
TheVTSBpinispoweredbytheLDOoutput(VREG)andwithamaximumoutputimpedanceof150Ω.
Figure11.
TSandVTSBPinInterfaceAnegative-temperature-coefficientthermistorinthetopologyshowninFigure11isassumed.
Withthisarrangement,thevoltageattheTSwillbelowerforhightemperature,andhigherforlowtemperature.
IfthevoltagemeasuredattheTSpinisbelowtheVHOTthreshold,apackovertemperatureconditionisdetected.
Intheextremefaultcases,anopen(disconnected)thermistorindicatesavoltageattheTSpinequivalenttotheVREGpullupvoltage,andashortedthermistorindicatesavoltagecloseto0(VSS).
Anopen-thermistorfaultrecoverswithinthefaultfiltertimefollowingremovaloftheopencondition.
Shorted-thermistordetectionplacesthedeviceintothelow-powerSHUTDOWNmode,requiringre-insertionintoachargerforwakeup.
ExternalBiasSupplyDetectionDuringthetimeperiodinwhichthebq77910Achecksthethermistorstatus,aweak(nominal1-A)currentisappliedfromtheTSpintoVSS.
IfV_TS>V_EXT_PU,thentheICoperatesasifanexternalsupplyispresentanddoesnotenabletheVTSBinternalsupply.
Asequenceofoperationsisperformedtodeterminetheexistenceofshortedthermistor,openthermistor,orpackovertemperaturefaultsaslistedinthefollowingsection.
28SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012TemperatureMeasurement/FaultDetectionLogicFlowDiagramBatteryPack/ChargerShared-ThermistorFunctionalityThepulsingoftheVTSBpinisenabledONLYwhentheICdeterminesthatthereisnoexternalsupply(e.
g.
,fromthecharger)alreadydrivingthethermistor.
Thisallowsasinglethermistortobeusedbyboththebq77910Aandtheexternalchargertomeasurepacktemperature.
Thiscanalsobeusedasamethodofchargerpresencedetectionincaseadedicatedcharger-detectpinisnotimplementedintheend-equipmentpackdesign.
Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback29ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comByconnectingtheCHGSTpintotheTSpinonthebattery-packinternalcircuitboard,athree-terminalbattery-packdesignwithand(T)(thermistor)contactsiscompatiblewiththecharger-detectionmechanismofthebq77910A.
BecausetheexternalchargernormallyappliesabiasvoltagetotheTSpinfromanexternalsource,thereisavoltagepresentontheCHGSTpinwheneverthepackisinsertedintothecharger.
NOTEVTH_xxx(thresholds)areratiometricbaseduponVREG.
CareshouldbetakenifusinganexternalpulluptoavoltageotherthantheVREGvoltagetoaccountforthedifferenceinthesedetectionthresholds.
DependingonthearrangementofthepowerFETswithinthepack,thesharingofacommonthermistorbetweentheBMUandtheexternalchargermaynotbefeasible.
ApplicationswhichdonotuseaCHGdisconnectionFETaresupported,becausethereisacommongroundreferencebetweentheexternalchargerandtheinternalICground.
IncaseofapplicationswhichdouseaCHGFET,thefollowingissuesshouldbeunderstoodfromthesystempointofview:WhentheCHGFETisdisabled(asinafaultcondition),theinternalreference(VSSpinoftheIC)isdisconnectedfromtheexternalreference(CPCKNconnectedtochargerreturnpath).
Whenachargerisconnectedandpoweredon,theCPCKNvoltageisnegative,anditispossiblethattheCHGSTpinisnegativewithrespecttotheICVSSpin.
TheCHGSTandTSpinsarenotinternallyprotectedfromnegativevoltages.
IfanexternalclampcircuitisusedtopreventtheCHGSTvoltagefromgoingbelow0VwithrespecttoVSS,andtheCHGST/TSpinsareconnectedwithinthepack,theTSpinindicatesaninvalidtemperaturerange(orperceivedthermistor-shortedfault)untiltheCHGFETisclosed.
Ifachargerisconnectedandnotpoweredon,theCHGSTpinmaybepulleduptothePACK+rail.
Thispinisinternallyclampedtoasafevoltage;however,seriesresistanceisrequiredtoavoidovercurrentdamagetotheinternalclampingcircuit.
IftheCHGSTandTSpinsaretiedtogetherwithinthepack,thisresistanceaffectsthereadingofthepackinternalthermistorbytheexternaldevice.
Ideally,theexternalchargershouldbedesignedsuchthatanegativevoltage(withrespecttothepackinternalVSS)cannotbeimposedontheCHGST/TSpinwhenachargerisconnected.
InthecaseoftheCHGFETONandcurrentflowing,theCPCKNpotentialmaybeafewhundredmillivoltsbelowtheICVSSpin(dependingonchargecurrentlevelandchargeFETon-resistance).
Thisalsoaffectstheaccuracyofthethermistorvoltageasreadbytheexternalcharger.
AsuggestedapproachisfortheexternalchargertomomentarilyinterruptchargecurrentflowwhiletakingthepacktemperaturereadingwhenaCHGFETisimplemented.
Charge/DischargeEnableOperatingThresholdsIfthevoltagemeasuredattheTSpinisbelowVTH_HOT,apackovertemperatureconditionisdetected.
Thebq77910AdisablesthechargeanddischargeFETs(butremainsintheactivemode).
Usingastandard103ATthermistorand10-kΩpullupresistor,thiscorrespondstoapproximately60°C.
Thetemperaturelevelischosentobeslightlyabovethenormalchargedisablelevelimplementedbyanexternalcharger,andwouldnotnormallyactivateduringchargeunlessthecharger'sownovertemperatureshutdowndidnottriggerbeforethislevel.
Theexternalchargertypicallyalsohasacold-temperaturechargeinhibit(roughlybetween0°Cand10°C)asshowninFigure12.
30SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012Figure12.
TypicalThermistorResponseandProtectionThresholds(VTSB=3.
3V,Pullup=10kΩ)Thebq77910Alimitspackoperationinthecaseofanovertemperature,undertemperature,open,orshortedthermistor.
AnovertemperaturefaultopenstheprotectionFETsonly;ashorted-thermistorfaultalsoputsthedeviceintolow-power/faultprotectionmode.
Duetotherangeofresistancevaluesavailablewithatypicalthermistor,anundertemperaturefaultisindistinguishablefromanopen-thermistorfaultandhasthesameprotectionmechanism(enterprotectionstate,butdevicestaysawake).
TheVTH_OPEN,VHOT,andVTH_SHORTthresholdsareratiometrictotheVTSBpinbiasvoltage.
Typicalvaluesareshown;seetheparametrictablesfordetails.
OV_TS_CTRL(EEPROMBit)InterfaceInthecaseofabatterypackwhichimplementsaCHGpassFET,thechargingfunctioncanbedisabledbyopeningtheFETduringfaultconditions.
However,inthecaseofadesignwhichdoesnotimplementaCHGpassFET,useoftheEEPROMbitOV_TS_CTRLcanallowthebq77910Atocommunicateanovervoltagefaultconditiontotheexternalcharger.
Withachargerusingthethermistorlocatedwithinthebatterypack(whichisalsoconnectedtotheTSpin),iftheOV_TS_CTRLbitissetto1,theTSpinispulledtoVSSwheneveranOVfaultoccurs.
Theresultisthattheexternalchargerreadsathermistorvalueequivalenttoahotbatteryconditionandsuspendscharging.
Whenthebq77910AispullingtheTSpintoground,theCHGSTdetectionfunctionismomentarilydisabledasnotedintheTemperatureMeasurement/FaultDetectionLogicFlowDiagramsection.
IftheOV_TS_CTRLbitissetto1,theTSlineispulledtogroundregardlessofthestateoftheCHG_TMP_DISbit(theTSpulldownfunctionalityisimplementedbasedonOVfaultcondition,evenifinternaltemperaturemonitoringisdisabled).
WhenTSispulleddown,charger-presencedetectionstilloperatesonasampledbasis.
TheTSpinisreleasedfor200msoutofevery4secondstotestforanexternalchargerconnection.
UVFault–SecondaryDelayFunction(SeeAlsoCellUndervoltageDetectionandRecovery)Whenanundervoltagefaultoccurs(anycellvoltageVUV+hysteresis,whichcouldbealmostinstantaneouslyiftheloadcurrentishighandthecellsstillcontaincapacity.
CareshouldbetakenwhenusingUV_REC=0,asitcancausetheFETsandcellstooverheatifthresholdsettingsarenotproperlyconsidered.
IfUV_REC=1,thenallthecellvoltagesmustbe>VUV+hysteresis,ANDtheloadmustalsoberemoved.
Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback31ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comAdditionally,ifUV_REC_DLY=1andallthecellvoltagesremain8seconds,or(b)Disabledelaytime(pullZEDEtologichigh)ANDconnectTStoVSSfor>1second.
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com2.
Asshowninthefaultdetection/recoverytable,thedevicegoesintolow-powershutdownmodeduetoaperceivedshorted-thermistorfault.
ForbatterypackswhichallowtheTSpinsignaltobebroughttoanexternalcontact,theaboveprocedurecanbeimplementedafterfinalpackmechanicalassembly.
UseoftheTSpintosimulateafaultavoidstherisksassociatedwithforcingamomentarycellUVorapparentOCD/SCD/SCCconditionafterthepackhasbeenfullyorpartiallyassembled.
SERIALCOMMUNICATIONINTERFACEDeviceAddressingandProtocolOverviewThebq77910AusesasubsetoftheI2Ccommunicationprotocoltoallowprogrammingandtestofinternalregisters.
Thedataisclockedviaseparatedata(SDATA)andclock(SCLK)pins.
Thebq77910Aactsasaslavedeviceanddoesnotgenerateclockpulses;itmustbeaddressedandcontrolledfromanexternalI2Cbusmasterdevice.
Theslaveaddressforthebq77910Ahasa7-bitvalueof0010000.
Thebq77910AcommunicationsprotocolvariesfromthefullI2Cstandardasfollows:Thebq77910Aisalwaysregardedasaslave.
Thebq77910AdoesnotsupportthegeneralcodeoftheI2Cspecification.
Thebq77910Adoesnotsupportaddressauto-increment,whichallowscontinuousreadingandwriting.
Thebq77910Aallowsdatatobewrittenorreadfromthesamelocationwithoutre-sendingthelocationaddress.
(MSB)I2CAddress+R/Wbit(LSB)(MSB)I2CAddress(LSB)Write00010000Read1BusWriteCommandtobq77910ABusReadCommandfrombq77910A(ProtocolA)BusReadCommandfrombq77910A(ProtocolB)38SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012REGISTERSETANDPROGRAMMINGMemoryMapThebq77910Ahas10programmableEEPROMregistersandoneRAMregisterusedtoaccess/writetheEEPROMdata.
TheEEPROMbitsareusedtoprogramthevariousthreshold,delay,configuration,andrecoverycontrolsettings.
Theaddress,registernames,andindividualcontrolbitnamesareshowninthefollowingtable.
Descriptionsofeachindividualregisterandavailableprogrammingoptionsareprovidedinthesubsequentsections.
BitslabeledRSVDx(gray)areunusedandleftforfutureoptions.
AddressRegisterName765432100x00EE_PROG(1)VGOOD(1)0x01SYS_CFGCNF2CNF1CNF0CHG_TMP_DISTMPENOT_RECRSVD1SOR0x02OV_CFG1RSVD2RSVD3OVT5OVT4OVT3OVT2OVT1OVT00x03OV_CFG2OV_TS_CTRLOVH2OVH1OVH0RSVD4OVD2OVD1OVD00x04UV_CFG1UV_HYST_INHRSVD6RSVD7RSVD8UVT3UVT2UVT1UVT00x05UV_CFG2UV_RECUV_REC_DLYUVH1UVH0RSVD10UVD2UVD1UVD00x06OCD_DELAYRSVD11RSVD12RSVD13OCDD4OCDD3OCDD2OCDD1OCDD00x07SCD_DELAYRSVD14RSVD15ISNS_RNGSCDD_RNGSCDD3SCDD2SCDD1SCDD00x08OCD_SCD_TRIPSCDT3SCDT2SCDT1SCDT0OCDT3OCDT2OCDT1OCDT00x09SCC_CFGSCCD3SCCD2SCCD1SCCD0SCCT3SCCT2SCCT1SCCT00x0ACELL_BAL_CFGCB_EN1CB_EN0CBT1CBT0CBV3CBV2CBV1CBV0(1)Read-onlybit.
SystemConfiguration(SYS_CFG,Address0x01)BitNumber76543210BitNameCNF2CNF1CNF0CHG_TMP_DIS(1)(2)TMPENOT_RECRSVD1SORIf0RecoverfromOTfaultDefaultvalue–thermalRecoverfromDisabletemperaturewhenpackhascooledprotectionactiveinallOCD/SCDwhensensingbelowlimit(incl.
modesloadremoved8possiblesettingstohysteresis)determinepackThisbitmustbeIf1Thermalprotectionconfiguration(4to10RecoverfromOTfaultsetto0.
enabledonlywhennoRecoverfromcells);seefollowingwhenpackhascooledchargerdetected;thermalEnabletemperatureOCD/SCDwhentablebelowlimit(incl.
protectionDISABLEDsensingloadremovedandhysteresis)ANDLOADwhenCHARGERchargerattachedREMOVEDPRESENT(1)IfCHG_TMP_DIS=1,allthermalfaultsareclearedwhenapackisinsertedintoacharger.
(2)CHG_TMP_DIStakespriorityoverOT_REC.
Ifbothare=1,thenthermalfaultsareclearedwheneverinsertedintoacharger.
PackConfiguration(NumberofCells)Variouspacksizesbetween4and10seriescellsareconfiguredusingtheCNF[2:0]bitsasshown.
CNF[2:0]PackConfiguration(#Cells)00010001901080117100610151104111DonotuseCopyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback39ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
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comOVDetectionConfiguration#1(OV_CFG1,Address0x02)BitNumber76543210BitNameRSVD2RSVD3OVT5OVT4OVT3OVT2OVT1OVT0If0NOTUSEDNOTUSEDOvervoltagetripthreshold(64possiblevalues);seefollowingtable.
If1NOTUSEDNOTUSEDProgrammableOvervoltageThresholdSettingsUsingthe5bitsOVT[5:0],upto64possiblesetpointsforovervoltagetriparepossible,asshown.
OVTsettingischosentomatchthecelltypeandapplicationrequirements.
OVT[5:0]OVTrip(Volts)OVT[5:0]OVTrip(Volts)0x002.
8000x203.
6000x012.
8250x213.
6250x022.
8500x223.
6500x032.
8750x233.
6750x042.
9000x243.
7000x052.
9250x253.
7250x062.
9500x263.
7500x072.
9750x273.
7750x083.
0000x283.
8000x093.
0250x293.
8250x0A3.
0500x2A3.
8500x0B3.
0750x2B3.
8750x0C3.
1000x2C3.
9000x0D3.
1250x2D3.
9250x0E3.
1500x2E3.
9500x0F3.
1750x2F3.
9750x103.
2000x304.
0000x113.
2250x314.
0250x123.
2500x324.
0500x133.
2750x334.
0750x143.
3000x344.
1000x153.
3250x354.
1250x163.
3500x364.
1500x173.
3750x374.
1750x183.
4000x384.
2000x193.
4250x394.
2250x1A3.
4500x3A4.
2500x1B3.
4750x3B4.
2750x1C3.
5000x3C4.
3000x1D3.
5250x3D4.
3250x1E3.
5500x3E4.
3500x1F3.
5750x3F4.
37540SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
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comSLUSAV6–FEBRUARY2012OVDetectionConfiguration#2(OV_CFG2,Address0x03)BitNumber76543210BitNameOV_TS_CTRLOVH2OVH1OVH0RSVD4OVDOVD1OVD02If0DonotuseTSlineforexternalcharger8possiblesettingstocontrolNOTUSED8possiblesettingstocontrolOVhysteresis(seefollowingcontrolOVsensedelaytable)If1UseTSlineforexternalchargercontrol(seefollowingtable)NOTUSED(ifOVevent,pullTS=low)OVHysteresisSettingsEightpossiblehysteresissettingsareselectableusingthebitsOVH[2:0]asshowninthefollowingtable.
OVH[2:0]OVHysteresis(mV)00030000125001020001115010010010150110251110OVDelaySettingsEightpossibleOVtriptimedelaysettingsareselectableusingthebitsOVD[2:0]OVH[2:0]OVDelay(Seconds)0000.
500010.
750101.
000111.
251001.
501011.
751102.
001112.
25UVDetectionConfiguration#1(UV_CFG1,Address0x04)BitNumber76543210BitNameUV_HYST_INHRSVD6RSVD7RSVD8UVT3UVT2UVT1UVT0If0UsehysteresisthresholdtoallowrecoveryafterUVNOTUSEDNOTUSEDNOTUSEDcondition(DEFAULT)Setoneof16possiblevalues;seefollowingtable.
If1Donotuse(inhibit)hysteresisthresholdtoallowrecoveryNOTUSEDNOTUSEDNOTUSEDfromUVthresholdUndervoltageTripThresholdSettingsThespecificundervoltagetrippointrequiredbythecelltypeandapplicationcanbesetusingtheUVT[3:0]bitsasshownhere:Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback41ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
ti.
comUVT[3:0]UVTripLevelUVT[3:0]UVTripLevel(Volts)(Volts)00001.
410002.
200011.
510012.
300101.
610102.
400111.
710112.
501001.
811002.
601011.
911012.
701102.
011102.
801112.
111112.
9UVDetectionConfiguration#2(UV_CFG2,Address0x05)Bit76543210NumberBitNameUV_RECUV_REC_DLYUVH1UVH0RSVD10UVD2UVD1UVD0If0RecoverfromUVfaultwhenallcellvoltagesincreaseabovePartdoesNOTenterSHUTDOWNmodefromNOTVUVthreshold+hyst.
CHGFETenabledimmediatelyiftheUVfaultstateUSED1of4possible1of8possiblevalues,chargerdetectedvalues,seebinaryspacing,seeIf1RecoverfromUVfaultonlywhenallcellvoltagesincreasePartdoesenterSHUTDOWNmodeifanycelltablebelowfollowingtable.
NOTaboveVUVthreshold+hystANDloadisremoved.
voltageremains8secondsinUSEDtheUVfaultstateUVHysteresisLevelTheUVhysteresisissetusingUVH[1:0]bits.
Fourpossiblevaluesareavailableasshown;however,themaximumrecoverylevelissetto3.
5VinthecaseofacombinationofhighUVtrippointplushighUVhysteresisvalues.
UVH[1:0]Hysteresis(Volts)000.
4010.
8101.
2111.
6RecoveryVoltage(CombinationofUVT+UVHsettings)HysteresisUVTripLevel0.
4V0.
8V1.
2V1.
6V1.
41.
82.
22.
63.
01.
51.
92.
32.
73.
11.
62.
02.
42.
83.
21.
72.
12.
52.
93.
31.
82.
22.
63.
03.
41.
92.
32.
73.
13.
52.
02.
42.
83.
23.
52.
12.
52.
93.
33.
52.
22.
63.
03.
43.
52.
32.
73.
13.
53.
52.
42.
83.
23.
53.
52.
52.
93.
33.
53.
52.
63.
03.
43.
53.
52.
73.
13.
53.
53.
52.
83.
23.
53.
53.
52.
93.
33.
53.
53.
542SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
ti.
comSLUSAV6–FEBRUARY2012UVDelayTimeEightpossibletimedelaysettingsfortheUVtripdelayareselectableusingtheUVD[2:0]bitsasshown.
UVH[2:0]Delay(Seconds)0000.
500110102011410081011611032111OFFOvercurrentinDischargeDelaySettings(OCD_DELAY,Address0x06)BitNumber76543210BitNameRSVD11RSVD12RSVD13OCDD4OCDD3OCDD2OCDD1OCDD0If0NOTUSEDNOTUSEDNOTUSEDOneof32possibledelaysettings,seefollowingtable.
If1NOTUSEDNOTUSEDNOTUSEDDischargeOvercurrentDetectionDelaySettingsOCDD[4:0]OCDetectionDelayOCDD[4:0]OCDetectionDelay(HEX)(ms)(HEX)(ms)0x00200x105000x01400x116000x02600x127000x03800x138000x041000x149000x051200x1510000x061400x1611000x071600x1712000x081800x1813000x092000x1914000x0A2200x1A15000x0B2400x1B16000x0C2600x1C17000x0D2800x1D18000x0E3000x1E19000x0F4000x1F2000ShortCircuitinDischargeDelaySettings(SCD_DELAY,Address0x07)BitNumber76543210BitNameRSVD14RSVD15ISNS_RNGSCDD_RNGSCDD3SCDD2SCDD1SCDD0If0NOTUSEDNOTUSEDUselowerrangeofvaluesforallshort-circuitandovercurrent-tripUsefastdelaysettingsthresholdsOneof16possibledelaysettingsineachrange,seefollowingtable.
If1NOTUSEDNOTUSEDUsehigherrangeofvaluesforallshort-circuitandovercurrent-tripUseslowdelaysettingsthresholdsSCDDelaySettingsTwoseparaterangesof16possibledelaytimevaluesareselectableasshownhere.
Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback43ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
ti.
comFastRange(SCDD_RNG=0)SlowRange(SCDD_RNG=1)SCDD[3:0]SCDetectionDelay(s)SCDD[3:0]SCDetectionDelay(ms)0x00600x00500x011200x011000x021800x022000x032400x033000x043000x044000x053600x055000x064200x066000x074800x077000x085400x088000x096000x099000x0A6600x0A10000x0B7200x0B11000x0C7800x0C12000x0D8400x0D13000x0E9000x0E14000x0F9600x0F1500DischargeOvercurrent/Short-CircuitTripLevels(OCD_SCD_TRIP,Address0x08)BitNumber76543210BitNameSCDT3SCDT2SCDT1SCDT0OCDT3OCDT2OCDT1OCDT0If0Oneof16possibleSCtripsettings(senseresistorvoltage),Oneof16possibleOCtripsettings(senseresistorvoltage),seefollowingtable.
seefollowingtable.
If1NOTE:SCDandOCDtriplevelsarecontrolledbycurrent-sensegain-controlbitISNS_RNGlocatedinregister0x07.
TriplevelsmeasuredatSENSE–arereferencedtoSENSE+.
DischargeShort-CircuitTrip-LevelSettings(Sense-ResistorVoltage)DischargeShort-CircuitTripLevel,DischargeShort-CircuitTripLevel,SCDT[3:0]mVatSENSE(–),mVatSENSE(–),WithISNS_RNG=0WithISNS_RNG=1000040200000150250001060300001170350010080400010190450011010050001111105501000120600100113065010101407001011150750110016080011011708501110180900111119095044SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
ti.
comSLUSAV6–FEBRUARY2012DischargeOvercurrentTrip-LevelSettings(Sense-ResistorVoltage)DischargeOvercurrentTripLevel,DischargeOvercurrentTripLevel,OCDT[3:0]mVatSENSE(–),mVatSENSE(–),WithISNS_RNG=0WithISNS_RNG=10000251250001301500010351750011402000100452250101502500110552750111603001000653251001703501010753751011804001100854251101904501110954751111100500ChargeShort-CircuitThresholdandDelaySettings(SCC_CFG,Address0x09)BitNumber76543210BitNameSCCD3SCCD2SCCD1SCCD0SCCT3SCCT2SCCT1SCCT0If0Oneof16possiblechargershort-circuitsensingdelayOneof16possiblechargershort-circuitsensingthresholdsettings,seefollowingtable.
settings(senseresistorvoltage),seefollowingtable.
If1NOTE:SCCtrip-levelrangeiscontrolledbycurrent-sensegain-controlbitISNS_RNG,locatedinregister0x07.
TriplevelsmeasuredatSENSE–arereferencedtoSENSE+.
ChargeShort-CircuitDelay-TimeSettingsChargeShort-CircuitChargeShort-CircuitSCCD[3:0]SCCD[3:0]Delay(s)Delay(s)000060100054000011201001600001018010106600011240101172001003001100780010136011018400110420111090001114801111960ChargeShort-CircuitTrip-LevelSettingsChargeShort-CircuitTripLevel,ChargeShort-CircuitTripLevel,SCCT[3:0]mVatSENSE(–),mVatSENSE(–),WithISNS_RNG=0WithISNS_RNG=10000–100–500001–150–750010–20–1000011–25–125Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback45ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
ti.
comChargeShort-CircuitTripLevel,ChargeShort-CircuitTripLevel,SCCT[3:0]mVatSENSE(–),mVatSENSE(–),WithISNS_RNG=0WithISNS_RNG=10100–30–1500101–35–1750110–40–2000111–45–2251000–50–2501001–55–2751010–60–3001011–65–3251100–70–3501101–75–3751110–80–4001111–85–425Cell-BalancingConfiguration(CELL_BAL_CFG,Address0x0A)BitNumber76543210BitNameCB_EN1CB_EN0CBT1CBT0CBV3CBV2CBV1CBV0If0See4possiblevaluesSee4possiblevaluesOneof16possiblesettingsforcell-balancethresholdfollowingfollowing(highestcellvoltagetoinitiatebalanceaction)If1Cell-BalanceEnableControlCB_EN[1:0]CellBalanceFunction00Disablecell-balancefunctionEnablecell-balancefunction(1)atalltimes–startbalancing(timercounting)wheneverCBVthresholdisreached,terminate01whentimerexpires.
BalancingrestartsonceallcellshavefirstfallenbelowtheCBVthresholdandthenatleastonecellagainreachestheCBVthreshold.
Enablecellbalancefunction(1)whenchargerdetected,terminatewhenchargerremoved.
10(Note:Thisisrecommendedonlywithchargersthatkeepthebatterytopped-off,i.
e.
,maintenancechargeimplementedafterregularchargecompletion.
)Enablecell-balancefunction(1)whenchargerisdetected,terminatewhenchargerisremovedORwhentimerexpires.
11Followingtimerexpiration,thechargermustbedisconnectedthenreconnectedtorestartbalancing.
(1)Enablecellbalancefunctionmeansthatthelogiccheckscellvoltagestodecideifbalancingaction(currentbleed/bypass)shouldoccur.
Startbalancingisdefinedasthetimewhenthealgorithmisactive,i.
e.
actuallydivertingcurrentaroundacell.
Timerinitiationbeginswhenbalancingactionstarts,notwhenchargerisdetected.
Cell-BalanceTimerCellbalancing,ifenabled,beginswhenthechargerispresentandthefirstcellexceedstheCBVstartthreshold.
Cellbalancingisterminatedwhenthechargerisremoved,orafterCBTtimeoutintervalregardlessofcharger-removaldetection.
Thismethodisusedtopreventcontinuousdrainofthecellsinthecasewherethebatterypackisstoredinthechargerafterchargetermination.
CBT[1:0]TimeoutLength(Hours)001012104118CellBalanceVoltageThresholdSettingsWhenanycellreachestheprogrammedsetting,thecellbalancealgorithmbeginsasdiscussedpreviouslyintheoperation/applicationssection.
CellbalancingmustbeenabledviatheCB_ENcontrolbit,andinsomecases(seetheCell-BalanceEnableControlsection)thechargermustbedetectedforthealgorithmtoinitiate.
46SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910Abq77910Awww.
ti.
comSLUSAV6–FEBRUARY2012CBV[3:0]CellVoltage00003.
900013.
800103.
700113.
601003.
501013.
401103.
301113.
210003.
110013.
010102.
910112.
811002.
711012.
611102.
511112.
4EEPROMControlRegister(EEPROM,Address0x0B)BitNumber76543210BitNameEEPROM7EEPROM6EEPROM5EEPROM4EEPROM3EEPROM2EEPROM1EEPROM0ThesebitsenabledatawritetoEEPROMlocations(0x01–0x0A)whenwrittenwithdata01000001(0x41).
Pre-readofEEPROMdataisavailablebysettingthesebitswith0110-0010(0x62).
Defaultis0000-0000(0x00).
EEPROMWriteSequenceEEPROMiswrittenbyI2Ccommand.
WhenZEDE=H,theSCLKandSDATAlinesareenabledtoallowI2Ccommunication.
(MSB)I2CAddress+R/Wbit(LSB)(MSB)I2CAddress(LSB)Write00010000Read1Thebq77910AhasintegratedconfigurationEEPROMforOV,UV,OCD,SCD,andSCCthresholdsanddelays.
Theappropriateconfigurationdataisprogrammedtotheconfigurationregistersandthen0x41issenttotheEEPROMregistertoenableprogramming.
BydrivingtheEEPROMpin(sethighandthenlow),thedataiswrittentotheEEPROM.
TherecommendedvoltageatBATforEEPROMwritingis>7V.
AflowchartshowingtheEEPROMwrite/checksequenceisshowninFigure18.
ParityCheckThebq77910AusesEEPROMforstorageofprotectionthresholdsanddelaytimesaspreviouslydescribed.
AdditionalEEPROMisalsousedtostoreinternaltrimmingdata.
Forsafetyreasons,thebq77910Ausesacolumn-parityerror-checkingscheme.
Ifthecolumn-paritybitischangedfromthewrittendata,bothDSGandCHGFETsareforcedOFFasafail-safemechanism.
Copyright2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback47ProductFolderLink(s):bq77910Abq77910ASLUSAV6–FEBRUARY2012www.
ti.
comFigure18.
EEPROMProgrammingFlowDiagram48SubmitDocumentationFeedbackCopyright2012,TexasInstrumentsIncorporatedProductFolderLink(s):bq77910APACKAGEOPTIONADDENDUMwww.
ti.
com28-Mar-2012Addendum-Page1PACKAGINGINFORMATIONOrderableDeviceStatus(1)PackageTypePackageDrawingPinsPackageQtyEcoPlan(2)Lead/BallFinishMSLPeakTemp(3)Samples(RequiresLogin)BQ77910ADBTACTIVETSSOPDBT3850Green(RoHS&noSb/Br)CUNIPDAULevel-2-260C-1YEARBQ77910ADBTRACTIVETSSOPDBT382000Green(RoHS&noSb/Br)CUNIPDAULevel-2-260C-1YEAR(1)Themarketingstatusvaluesaredefinedasfollows:ACTIVE:Productdevicerecommendedfornewdesigns.
LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect.
NRND:Notrecommendedfornewdesigns.
Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartinanewdesign.
PREVIEW:Devicehasbeenannouncedbutisnotinproduction.
Samplesmayormaynotbeavailable.
OBSOLETE:TIhasdiscontinuedtheproductionofthedevice.
(2)EcoPlan-Theplannedeco-friendlyclassification:Pb-Free(RoHS),Pb-Free(RoHSExempt),orGreen(RoHS&noSb/Br)-pleasecheckhttp://www.
ti.
com/productcontentforthelatestavailabilityinformationandadditionalproductcontentdetails.
TBD:ThePb-Free/Greenconversionplanhasnotbeendefined.
Pb-Free(RoHS):TI'sterms"Lead-Free"or"Pb-Free"meansemiconductorproductsthatarecompatiblewiththecurrentRoHSrequirementsforall6substances,includingtherequirementthatleadnotexceed0.
1%byweightinhomogeneousmaterials.
Wheredesignedtobesolderedathightemperatures,TIPb-Freeproductsaresuitableforuseinspecifiedlead-freeprocesses.
Pb-Free(RoHSExempt):ThiscomponenthasaRoHSexemptionforeither1)lead-basedflip-chipsolderbumpsusedbetweenthedieandpackage,or2)lead-baseddieadhesiveusedbetweenthedieandleadframe.
ThecomponentisotherwiseconsideredPb-Free(RoHScompatible)asdefinedabove.
Green(RoHS&noSb/Br):TIdefines"Green"tomeanPb-Free(RoHScompatible),andfreeofBromine(Br)andAntimony(Sb)basedflameretardants(BrorSbdonotexceed0.
1%byweightinhomogeneousmaterial)(3)MSL,PeakTemp.
--TheMoistureSensitivityLevelratingaccordingtotheJEDECindustrystandardclassifications,andpeaksoldertemperature.
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