Systemamd裁员

AdvancedMicroDevicesAMDAthlon64X2Dual-CoreProcessorProductDataSheetCompatiblewithExisting32-BitCodeBase–IncludingsupportforSSE,SSE2,SSE3*,MMX,3DNow!
technologyandlegacyx86instructions*SSE3supportedbyRevEandlaterprocessors.
–Runsexistingoperatingsystemsanddrivers–LocalAPICon-chipAMD64Technology–AMD64technologyinstructionsetextensions–64-bitintegerregisters,48-bitvirtualaddresses,40-bitphysicaladdresses–Eightadditional64-bitintegerregisters(16total)–Eightadditional128-bitSSE/SSE2/SSE3registers(16total)Dual-CoreArchitecture–DiscreteL1andL2cachestructuresforeachcoreHyperTransportTechnologytoI/ODevices–One16-bitlinksupportingspeedsupto1GHz(2000MT/s)or4Gigabytes/sineachdirection64-Kbyte2-WayAssociativeECC-ProtectedL1DataCaches–Two64-bitoperationspercycle,3-cyclelatency64-Kbyte2-WayAssociativeParity-ProtectedL1InstructionCaches–Withadvancedbranchprediction16-WayAssociativeECC-ProtectedL2Caches–Exclusivecachearchitecture—storageinadditiontoL1caches–Upto1MbyteperL2cacheMachineCheckArchitecture–IncludeshardwarescrubbingofmajorECC-protectedarraysPowerManagement–Multiplelow-powerstatesincludingC1E**C1EsupportedbyRev.
Gorlaterprocessors.
–SystemManagementMode(SMM)–ACPI-compliant,includingsupportforprocessorperformancestates939-PinPackageSpecificFeaturesRefertotheAMDFunctionalDataSheet,939-PinPackage,order#31411,forfunctional,electrical,andmechanicaldetailsof939-pinpackageprocessors.
ElectricalInterfaces–HyperTransporttechnology:LVDS-likedifferential,unidirectional–DDRSDRAM:SSTL_2perJEDECspecification–Clock,reset,andtestsignalsalsouseDDRSDRAM-likeelectricalspecificationsPackaging–939-pinliddedmicroPGA–1.
27-mmpinpitch–31x31-rowpinarray–40mmx40mmorganicsubstrate–OrganicC4dieattachIntegratedMemoryController–Low-latency,high-bandwidth–144-bitDDRSDRAMat100,133,166,and200MHz–SupportsuptofourunbufferedDIMMs–ECCcheckingwithdouble-bitdetectandsingle-bitcorrect33425Publication#3.
10Revision:January2007IssueDate:233425Rev.
3.
10January2007AMDAthlon64X2DualCoreProductDataSheetSocketAM2SpecificFeaturesRefertotheSocketAM2ProcessorFunctionalDataSheet,order#31117,forfunctionalandmechanicaldetailsofsocketAM2processors.
RefertotheAMDNPT0FhFamilyProcessorElectricalDataSheet,order#31119,forelectricaldetailsofsocketAM2processors.
ElectricalInterfaces–HyperTransporttechnology:LVDS-likedifferential,unidirectional–DDR2SDRAM:SSTL_1.
8perJEDECspecification–Clock,reset,andtestsignalsalsouseDDR2SDRAM-likeelectricalspecificationsPackaging–LiddedmicroPGA–31x31gridarray–1.
27-mmpinpitch–CompliantwithRoHS(EUDirective2002/95/EC)withleadusedonlyinsmallamountsinspecificallyexemptedapplicationsIntegratedMemoryController–Low-latency,high-bandwidth–144-bitDDR2SDRAMcontrolleroperatingatupto400MHz–SupportsuptofourunbufferedDIMMs–ECCcheckingwithdouble-bitdetectandsingle-bitcorrect3AMDAthlon64X2DualCoreProductDataSheet33425Rev.
3.
10January2007RevisionHistory2005–2007AdvancedMicroDevices,Inc.
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ThecontentsofthisdocumentareprovidedinconnectionwithAdvancedMicroDevices,Inc.
("AMD")products.
AMDmakesnorepresentationsorwarrantieswithrespecttotheaccuracyorcompletenessofthecontentsofthispublicationandreservestherighttomakechangestospecificationsandproductdescriptionsatanytimewithoutnotice.
Theinformationcontainedhereinmaybeofapreliminaryoradvancenatureandissubjecttochangewithoutnotice.
Nolicense,whetherexpress,implied,arisingbyestoppelorotherwise,toanyintellectualpropertyrightsisgrantedbythispublication.
ExceptassetforthinAMD'sStandardTermsandConditionsofSale,AMDassumesnoliabilitywhatsoever,anddisclaimsanyexpressorimpliedwarranty,relatingtoitsproductsincluding,butnotlimitedto,theimpliedwarrantyofmerchantability,fitnessforaparticularpurpose,orinfringementofanyintellectualpropertyright.
AMD'sproductsarenotdesigned,intended,authorizedorwarrantedforuseascomponentsinsystemsintendedforsurgicalimplantintothebody,orinotherapplicationsintendedtosupportorsustainlife,orinanyotherapplicationinwhichthefailureofAMD'sproductcouldcreateasituationwherepersonalinjury,death,orseverepropertyorenvironmentaldamagemayoccur.
AMDreservestherighttodiscontinueormakechangestoitsproductsatanytimewithoutnotice.
TrademarksAMD,theAMDArrowlogo,AMDAthlonandcombinationsthereof,and3DNow!
aretrademarksofAdvancedMicroDevices,Inc.
HyperTransportisalicensedtrademarkoftheHyperTransportTechnologyConsortium.
MMXisatrademarkofIntelCorporation.
Otherproductnamesusedinthispublicationareforidentificationpurposesonlyandmaybetrademarksoftheirrespectivecompanies.
DateRevisionDescriptionJanuary20073.
10FourthPublicrelease.
AddedsupportfortheC1Elow-powerstateinRev.
Gorlaterprocessors.
September20063.
08ThirdPublicrelease.
AddedRoHScompliancestatement.
AddedasterisknotetoSSE3.
June20063.
02Publicrelease.
AddedSocketAM2SpecificFeaturesCreatedheadingfor939-PinPackageSpecificFeaturesPlacedElectricalInterfaces,Packaging,andIntegratedMemoryControllerbulletsunderthenew939-PinPackageSpecificFeaturesheading.
May20053.
00Initialpublicrelease.