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1of6091201FEATURES§All-SiliconTimingCircuit§FiveTapsEquallySpaced§DelaysareStableandPrecise§BothLeading-andTrailing-EdgeAccuracy§3.
3VVersionoftheDS1100§Low-PowerCMOS§TTL-/CMOS-compatible§Vapor-PhaseandIRSolderable§CustomDelaysAvailable§Fast-TurnPrototypes§DelaysSpecifiedOverBothCommercialandIndustrialTemperatureRangesPINASSIGNMENTPINDESCRIPTIONTAP1toTAP5-TAPOutputNumberVCC-+3.
3VGND-GroundIN-InputDESCRIPTIONTheDS1100Lisa3.
3VversionoftheDS1100.
Itischaracterizedforoperationovertherange3.
0Vto3.
6V.
TheDS1100Lseriesdelaylineshavefiveequallyspacedtapsprovidingdelaysfrom4nsto500ns.
Thesedevicesareofferedinsurface-mountpackagestosavePCboardarea.
Lowcostandsuperiorreliabilityoverhybridtechnologyisachievedbythecombinationofa100%silicondelaylineandindustry-standardSOPandSOpackaging.
TheDS1100L5-tapsilicondelaylinereproducestheinput-logicstateattheoutputafterafixeddelayasspecifiedbytheextensionofthepartnumberafterthedash.
TheDS1100Lisdesignedtoreproducebothleadingandtrailingedgeswithequalprecision.
Eachtapiscapableofdrivinguptoten74LSloads.
DallasSemiconductorcancustomizestandardproductstomeetspecialneeds.
DS1100L3.
3V5-TapEconomyTimingElement(DelayLine)www.
maxim-ic.
com12348765VCCTAP1TAP3TAP5INTAP2TAP4GNDDS1100LZSO(150mil)DS1100LUSOPPRELIMINARYDS1100L2of6Figure1.
LOGICDIAGRAM.
Table1.
DS1100LPARTNUMBERDELAYTABLE(AllValuesinns)NOMINALDELAYSPARTDS1100L-XXXTAP1TAP2TAP3TAP4TAP5-2048121620-25510152025-30612182430-35714212835-40816243240-45918273645-501020304050-601224364860-751530456075-10020406080100-125255075100125-150306090120150-1753570105140175-2004080120160200-25050100150200250-30060120180240300-500100200300400500Figure2.
TIMINGDIAGRAM:SILICONDELAYLINEDS1100L3of6ABSOLUTEMAXIMUMRATINGS*VoltageonAnyPinRelativetoGround-0.
5Vto+6.
0VOperatingTemperatureRange-40°Cto+85°CStorageTemperatureRange-55°Cto+125°CSolderingTemperatureSeeIPC/JEDECJ-STD-020ASpecificationShort-CircuitOutputCurrent50mAfor1second*Thisisastressratingonlyandfunctionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationsectionsofthisspecificationisnotimplied.
Exposuretoabsolutemaximumratingconditionsforextendedperiodsoftimemayaffectreliability.
DCELECTRICALCHARACTERISTICS(VCC=3.
0Vto3.
6V;TA=-40°Cto+85°C.
)PARAMETERSYMTESTCONDITIONMINTYPMAXUNITSNOTESSupplyVoltageVCC3.
03.
33.
6V5High-LevelInputVoltageVIH2.
0VCC+0.
3V5Low-LevelInputVoltageVIL-0.
30.
8V5Input-LeakageCurrentII0.
0VVIVCC-1.
01.
0AActiveCurrentICCVCC=Max;Freq.
=1MHz10mA6,8High-LevelOutputCurrentIOHVCC=Min.
VOH=2.
3-1mALow-LevelOutputCurrentIOLVCC=Min.
VOL=0.
58mAACELECTRICALCHARACTERISTICS(VCC=3.
0Vto3.
6V;TA=-40°Cto+85°C.
)PARAMETERSYMTESTCONDITIONMINTYPMAXUNITSNOTESInputPulseWidthtWI20%ofTap5tPLHns9+25°C3.
3V-2Table1+2ns1,3,4,70°Cto+70°C-3Table1+3ns1,2,3,4,7Input-to-TapDelayTolerance(Delays40ns)tPLH,tPHL-40°Cto+85°C-4Table1+4ns1,2,3,4,7+25°C3.
3V-5Table1+5%1,3,4,70°Cto+70°C-8Table1+8%1,2,3,4,7Input-to-TapDelayTolerance(Delays>40ns)tPLH,tPHL-40°Cto+85°C-13Table1+13%1,2,3,4,7OutputRiseorFallTimetOF,tOR2.
02.
5nsPower-UpTimetPU200sInputPeriodPeriod2(tWI)ns9CAPACITANCE(TA=+25°C)PARAMETERSYMBOLMINTYPMAXUNITSNOTESInputCapacitanceCIN510pFDS1100L4of6NOTES:1)Initialtolerancesare±withrespecttothenominalvalueat+25°CandVCC=3.
3Vforbothleadingandtrailingedge.
2)Temperatureandvoltagetoleranceiswithrespecttothenominaldelayvalueoverthestatedtemperaturerange,andasupply-voltagerangeof3.
0Vto3.
6V.
3)Alltapdelaystendtovaryunidirectionallywithtemperatureorvoltagechanges.
Forexample,ifTAP1slowsdown,allothertapsalsoslowdown;TAP3canneverbefasterthanTAP2.
4)Intermediatedelayvaluesareavailableonacustombasis.
Forfurtherinformation,call(972)371-4348.
5)Allvoltagesarereferencedtoground.
6)Measuredwithoutputsopen.
7)SeeTestConditionssectionattheendofthisdatasheet.
8)Frequencyhigherthan1MHzresultinhigherICCvalues.
9)Atornearmaximumfrequencythedelayaccuracycanvaryandwillbeapplicationsensitive(i.
e.
,decoupling,layout).
Figure3.
TESTCIRCUITDS1100L5of6TERMINOLOGYPeriod:Thetimeelapsedbetweentheleadingedgeofthefirstpulseandtheleadingedgeofthefollowingpulse.
tWI(PulseWidth):Theelapsedtimeonthepulsebetweenthe1.
5Vpointontheleadingedgeandthe1.
5Vpointonthetrailingedgeorthe1.
5Vpointonthetrailingedgeandthe1.
5Vpointontheleadingedge.
tRISE(InputRiseTime):Theelapsedtimebetweenthe20%andthe80%pointontheleadingedgeoftheinputpulse.
tFALL(InputFallTime):Theelapsedtimebetweenthe80%andthe20%pointonthetrailingedgeoftheinputpulse.
tPLH(TimeDelay,Rising):Theelapsedtimebetweenthe1.
5Vpointontheleadingedgeoftheinputpulseandthe1.
5Vpointontheleadingedgeofanytapoutputpulse.
tPHL(TimeDelay,Falling):Theelapsedtimebetweenthe1.
5Vpointonthetrailingedgeoftheinputpulseandthe1.
5Vpointonthetrailingedgeofanytapoutputpulse.
TESTSETUPDESCRIPTIONFigure3illustratesthehardwareconfigurationusedformeasuringthetimingparametersontheDS1100L.
Theinputwaveformisproducedbyaprecisionpulsegeneratorundersoftwarecontrol.
Timedelaysaremeasuredbyatimeintervalcounter(20psresolution)connectedbetweentheinputandeachtap.
EachtapisselectedandconnectedtothecounterbyaVHFswitchcontrolunit.
Allmeasurementsarefullyautomated,witheachinstrumentcontrolledbyacentralcomputeroveranIEEE488bus.
TESTCONDITIONSINPUT:AmbientTemperature:25°C±3°CSupplyVoltage(VCC):3.
3V±0.
1VInputPulse:High=3.
0V±0.
1VLow=0.
0V±0.
1VSourceImpedance:50WmaxRiseandFallTime:3.
0nsmax(measuredbetween10%and90%)PulseWidth:500ns(1sfor-500version)Period:1s(2sfor-500version)OUTPUT:Eachoutputisloadedwiththeequivalentofone74F04inputgate.
Delayismeasuredatthe1.
5Vlevelontherisingandfallingedge.
NOTE:Aboveconditionsarefortestonlyanddonotrestricttheoperationofthedeviceunderotherdatasheetconditions.
DS1100L6of6ORDERINGINFORMATIONDS1100LTOTALTIMEDELAY(ns):20,25,30,35,40,45,50,60,75,100,125,150,175,200,250,300,500PACKAGETYPE:Z=SO(150MIL)U=SOP
3VVersionoftheDS1100§Low-PowerCMOS§TTL-/CMOS-compatible§Vapor-PhaseandIRSolderable§CustomDelaysAvailable§Fast-TurnPrototypes§DelaysSpecifiedOverBothCommercialandIndustrialTemperatureRangesPINASSIGNMENTPINDESCRIPTIONTAP1toTAP5-TAPOutputNumberVCC-+3.
3VGND-GroundIN-InputDESCRIPTIONTheDS1100Lisa3.
3VversionoftheDS1100.
Itischaracterizedforoperationovertherange3.
0Vto3.
6V.
TheDS1100Lseriesdelaylineshavefiveequallyspacedtapsprovidingdelaysfrom4nsto500ns.
Thesedevicesareofferedinsurface-mountpackagestosavePCboardarea.
Lowcostandsuperiorreliabilityoverhybridtechnologyisachievedbythecombinationofa100%silicondelaylineandindustry-standardSOPandSOpackaging.
TheDS1100L5-tapsilicondelaylinereproducestheinput-logicstateattheoutputafterafixeddelayasspecifiedbytheextensionofthepartnumberafterthedash.
TheDS1100Lisdesignedtoreproducebothleadingandtrailingedgeswithequalprecision.
Eachtapiscapableofdrivinguptoten74LSloads.
DallasSemiconductorcancustomizestandardproductstomeetspecialneeds.
DS1100L3.
3V5-TapEconomyTimingElement(DelayLine)www.
maxim-ic.
com12348765VCCTAP1TAP3TAP5INTAP2TAP4GNDDS1100LZSO(150mil)DS1100LUSOPPRELIMINARYDS1100L2of6Figure1.
LOGICDIAGRAM.
Table1.
DS1100LPARTNUMBERDELAYTABLE(AllValuesinns)NOMINALDELAYSPARTDS1100L-XXXTAP1TAP2TAP3TAP4TAP5-2048121620-25510152025-30612182430-35714212835-40816243240-45918273645-501020304050-601224364860-751530456075-10020406080100-125255075100125-150306090120150-1753570105140175-2004080120160200-25050100150200250-30060120180240300-500100200300400500Figure2.
TIMINGDIAGRAM:SILICONDELAYLINEDS1100L3of6ABSOLUTEMAXIMUMRATINGS*VoltageonAnyPinRelativetoGround-0.
5Vto+6.
0VOperatingTemperatureRange-40°Cto+85°CStorageTemperatureRange-55°Cto+125°CSolderingTemperatureSeeIPC/JEDECJ-STD-020ASpecificationShort-CircuitOutputCurrent50mAfor1second*Thisisastressratingonlyandfunctionaloperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationsectionsofthisspecificationisnotimplied.
Exposuretoabsolutemaximumratingconditionsforextendedperiodsoftimemayaffectreliability.
DCELECTRICALCHARACTERISTICS(VCC=3.
0Vto3.
6V;TA=-40°Cto+85°C.
)PARAMETERSYMTESTCONDITIONMINTYPMAXUNITSNOTESSupplyVoltageVCC3.
03.
33.
6V5High-LevelInputVoltageVIH2.
0VCC+0.
3V5Low-LevelInputVoltageVIL-0.
30.
8V5Input-LeakageCurrentII0.
0VVIVCC-1.
01.
0AActiveCurrentICCVCC=Max;Freq.
=1MHz10mA6,8High-LevelOutputCurrentIOHVCC=Min.
VOH=2.
3-1mALow-LevelOutputCurrentIOLVCC=Min.
VOL=0.
58mAACELECTRICALCHARACTERISTICS(VCC=3.
0Vto3.
6V;TA=-40°Cto+85°C.
)PARAMETERSYMTESTCONDITIONMINTYPMAXUNITSNOTESInputPulseWidthtWI20%ofTap5tPLHns9+25°C3.
3V-2Table1+2ns1,3,4,70°Cto+70°C-3Table1+3ns1,2,3,4,7Input-to-TapDelayTolerance(Delays40ns)tPLH,tPHL-40°Cto+85°C-4Table1+4ns1,2,3,4,7+25°C3.
3V-5Table1+5%1,3,4,70°Cto+70°C-8Table1+8%1,2,3,4,7Input-to-TapDelayTolerance(Delays>40ns)tPLH,tPHL-40°Cto+85°C-13Table1+13%1,2,3,4,7OutputRiseorFallTimetOF,tOR2.
02.
5nsPower-UpTimetPU200sInputPeriodPeriod2(tWI)ns9CAPACITANCE(TA=+25°C)PARAMETERSYMBOLMINTYPMAXUNITSNOTESInputCapacitanceCIN510pFDS1100L4of6NOTES:1)Initialtolerancesare±withrespecttothenominalvalueat+25°CandVCC=3.
3Vforbothleadingandtrailingedge.
2)Temperatureandvoltagetoleranceiswithrespecttothenominaldelayvalueoverthestatedtemperaturerange,andasupply-voltagerangeof3.
0Vto3.
6V.
3)Alltapdelaystendtovaryunidirectionallywithtemperatureorvoltagechanges.
Forexample,ifTAP1slowsdown,allothertapsalsoslowdown;TAP3canneverbefasterthanTAP2.
4)Intermediatedelayvaluesareavailableonacustombasis.
Forfurtherinformation,call(972)371-4348.
5)Allvoltagesarereferencedtoground.
6)Measuredwithoutputsopen.
7)SeeTestConditionssectionattheendofthisdatasheet.
8)Frequencyhigherthan1MHzresultinhigherICCvalues.
9)Atornearmaximumfrequencythedelayaccuracycanvaryandwillbeapplicationsensitive(i.
e.
,decoupling,layout).
Figure3.
TESTCIRCUITDS1100L5of6TERMINOLOGYPeriod:Thetimeelapsedbetweentheleadingedgeofthefirstpulseandtheleadingedgeofthefollowingpulse.
tWI(PulseWidth):Theelapsedtimeonthepulsebetweenthe1.
5Vpointontheleadingedgeandthe1.
5Vpointonthetrailingedgeorthe1.
5Vpointonthetrailingedgeandthe1.
5Vpointontheleadingedge.
tRISE(InputRiseTime):Theelapsedtimebetweenthe20%andthe80%pointontheleadingedgeoftheinputpulse.
tFALL(InputFallTime):Theelapsedtimebetweenthe80%andthe20%pointonthetrailingedgeoftheinputpulse.
tPLH(TimeDelay,Rising):Theelapsedtimebetweenthe1.
5Vpointontheleadingedgeoftheinputpulseandthe1.
5Vpointontheleadingedgeofanytapoutputpulse.
tPHL(TimeDelay,Falling):Theelapsedtimebetweenthe1.
5Vpointonthetrailingedgeoftheinputpulseandthe1.
5Vpointonthetrailingedgeofanytapoutputpulse.
TESTSETUPDESCRIPTIONFigure3illustratesthehardwareconfigurationusedformeasuringthetimingparametersontheDS1100L.
Theinputwaveformisproducedbyaprecisionpulsegeneratorundersoftwarecontrol.
Timedelaysaremeasuredbyatimeintervalcounter(20psresolution)connectedbetweentheinputandeachtap.
EachtapisselectedandconnectedtothecounterbyaVHFswitchcontrolunit.
Allmeasurementsarefullyautomated,witheachinstrumentcontrolledbyacentralcomputeroveranIEEE488bus.
TESTCONDITIONSINPUT:AmbientTemperature:25°C±3°CSupplyVoltage(VCC):3.
3V±0.
1VInputPulse:High=3.
0V±0.
1VLow=0.
0V±0.
1VSourceImpedance:50WmaxRiseandFallTime:3.
0nsmax(measuredbetween10%and90%)PulseWidth:500ns(1sfor-500version)Period:1s(2sfor-500version)OUTPUT:Eachoutputisloadedwiththeequivalentofone74F04inputgate.
Delayismeasuredatthe1.
5Vlevelontherisingandfallingedge.
NOTE:Aboveconditionsarefortestonlyanddonotrestricttheoperationofthedeviceunderotherdatasheetconditions.
DS1100L6of6ORDERINGINFORMATIONDS1100LTOTALTIMEDELAY(ns):20,25,30,35,40,45,50,60,75,100,125,150,175,200,250,300,500PACKAGETYPE:Z=SO(150MIL)U=SOP
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